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Differential D102969

[GlobalISel] Add G_SBFX/G_UBFX to computeKnownBits
ClosedPublic

Authored by bcahoon on May 22 2021, 10:39 AM.

Details

Reviewers
foad
arsenm
paquette
RKSimon
Commits
rG53ab2d821ed5: [GlobalISel] Add G_SBFX/G_UBFX to computeKnownBits

Diff Detail

Event Timeline

bcahoon created this revision.May 22 2021, 10:39 AM
Herald added subscribers: hiraditya, rovka. · View Herald TranscriptMay 22 2021, 10:39 AM
bcahoon requested review of this revision.May 22 2021, 10:39 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 22 2021, 10:39 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
bcahoon mentioned this in D100149: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX.May 22 2021, 10:53 AM
Harbormaster completed remote builds in B105767: Diff 347207.May 22 2021, 11:34 AM
foad added reviewers: paquette, RKSimon.May 24 2021, 5:04 AM

Looks reasonable to me. My only slight concern is that the implementation could be more precise when offset and width are not exactly known - but I don't know if there's any point in trying to optimize that case.

foad added inline comments.May 24 2021, 5:09 AM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
524–525

For example, instead of expanding the calculation "(1 << Width) - 1" literally here, I think you might get better results with something like:

KnownBits Mask;
Mask.Zero = APInt::getBitsSetFrom(BitWidth, WidthKnown.getMaxValue());
Mask.One = APInt::getLowBitsSet(BitWidth, WidthKnown.getMinValue());
arsenm added inline comments.May 24 2021, 5:16 PM
llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
1794

Can you also test computeNumSignBits? It may just work as is

bcahoon updated this revision to Diff 347718.May 25 2021, 10:18 AM

Addressed review comments.
Use getBitsSetFrom and getLowBitsSet to compute mask for the width operand
of G_SBFX/G_UBFX as suggested.
Added tests for computeNumSignBits for G_SBFX/G_UBFX.
Fix clang-tidy formatting issues.

bcahoon marked 2 inline comments as done.May 25 2021, 10:22 AM
bcahoon added inline comments.
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
524–525

Thanks for the suggestion. I use getBitsSetFrom/getLowBitsSet when the Width value is known. I think generating the mask explicitly or creating the literal calculation should generate the same results. But, when the width is known, it makes sense to just create the mask explicitly.

Harbormaster completed remote builds in B106125: Diff 347718.May 25 2021, 11:03 AM
foad added inline comments.May 26 2021, 3:18 AM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
524–525

I don't understand why WidthKnown.isUnknown() should be a special case. But you might need some strategic std::mins to avoid passing a value larger than BitWidth into getBitsSetFrom/getLowBitsSet.

bcahoon updated this revision to Diff 348051.May 26 2021, 12:11 PM
bcahoon marked an inline comment as done.

Removed check for isUnknown, and limit value to BitWidth, as suggested in the review.

bcahoon marked an inline comment as done.May 26 2021, 12:11 PM
Harbormaster completed remote builds in B106350: Diff 348051.May 26 2021, 12:49 PM
RKSimon added a comment.May 27 2021, 2:51 AM

What about G_SBFX handling in GISelKnownBits::computeNumSignBits?

llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
528

Are you going to have any issues here when Mask.hasConflict() is true?

foad added inline comments.May 27 2021, 4:22 AM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
528

That can only happen if WidthKnown.getMinValue() > WidthKnown.getMaxValue(), which I guess can only happen if WidthKnown.hasConflict() was already true. What are the rules about introducing or propagating conflicts?

RKSimon added inline comments.May 28 2021, 3:45 AM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
528

Well, we do assert there is no conflict at the end of GISelKnownBits::computeKnownBitsImpl so we should be ensuring this doesn't happen.

foad added inline comments.May 28 2021, 3:50 AM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
528

Right, but I'm saying that this code can't produce a conflict out of thin air, only if one of the inputs already had a conflict, so I *think* it's OK. Would you agree?

bcahoon updated this revision to Diff 349162.Jun 1 2021, 7:06 PM

Fix formatting

bcahoon added inline comments.Jun 1 2021, 7:07 PM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
528

I'm not sure what, if anything, needs to be done to handle a conflict here? Appreciate any suggestions.

Harbormaster completed remote builds in B107170: Diff 349162.Jun 1 2021, 7:48 PM
RKSimon added inline comments.Jun 2 2021, 2:12 AM
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
528

Yes. I think you're right.

536

Would it be clearer to handle G_SBFX/G_UBFX separately?

bcahoon updated this revision to Diff 349290.Jun 2 2021, 8:52 AM

Separate the G_UBFX and G_SBFX cases.

bcahoon marked an inline comment as done.Jun 2 2021, 8:52 AM
Harbormaster completed remote builds in B107256: Diff 349290.Jun 2 2021, 9:38 AM
RKSimon accepted this revision.Jun 3 2021, 4:21 AM

LGTM with one minor - cheers.

llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
119

Please can you add a TODO suggesting we move this to KnownBits.h - it looks like this might be usable in other places (e.g. x86 BEXTR) in the future but until then its fine to keep it here.

This revision is now accepted and ready to land.Jun 3 2021, 4:21 AM
Closed by commit rG53ab2d821ed5: [GlobalISel] Add G_SBFX/G_UBFX to computeKnownBits (authored by bcahoon). · Explain WhyJun 3 2021, 1:10 PM
This revision was automatically updated to reflect the committed changes.
bcahoon added a commit: rG53ab2d821ed5: [GlobalISel] Add G_SBFX/G_UBFX to computeKnownBits.

Revision Contents

PathSize
llvm/
lib/
CodeGen/
GlobalISel/
42 lines
unittests/
CodeGen/
GlobalISel/
188 lines

Diff 349666

llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp

Show First 20 Lines • Show All 107 Lines • ▼ Show 20 Linesvoid GISelKnownBits::computeKnownBitsMin(Register Src0, Register Src1,
KnownBits Known2; KnownBits Known2;
computeKnownBitsImpl(Src0, Known2, DemandedElts, Depth); computeKnownBitsImpl(Src0, Known2, DemandedElts, Depth);
// Only known if known in both the LHS and RHS. // Only known if known in both the LHS and RHS.
Known = KnownBits::commonBits(Known, Known2); Known = KnownBits::commonBits(Known, Known2);
} }
// Bitfield extract is computed as (Src >> Offset) & Mask, where Mask is
// created using Width. Use this function when the inputs are KnownBits
// objects. TODO: Move this KnownBits.h if this is usable in more cases.
static KnownBits extractBits(unsigned BitWidth, const KnownBits &SrcOpKnown,
RKSimonUnsubmitted
Not Done
ReplyInline Actions

Please can you add a TODO suggesting we move this to KnownBits.h - it looks like this might be usable in other places (e.g. x86 BEXTR) in the future but until then its fine to keep it here.

RKSimon: Please can you add a TODO suggesting we move this to KnownBits.h - it looks like this might be…
const KnownBits &OffsetKnown,
const KnownBits &WidthKnown) {
KnownBits Mask(BitWidth);
Mask.Zero = APInt::getBitsSetFrom(
BitWidth, WidthKnown.getMaxValue().getLimitedValue(BitWidth));
Mask.One = APInt::getLowBitsSet(
BitWidth, WidthKnown.getMinValue().getLimitedValue(BitWidth));
return KnownBits::lshr(SrcOpKnown, OffsetKnown) & Mask;
}
void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known, void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
const APInt &DemandedElts, const APInt &DemandedElts,
unsigned Depth) { unsigned Depth) {
MachineInstr &MI = *MRI.getVRegDef(R); MachineInstr &MI = *MRI.getVRegDef(R);
unsigned Opcode = MI.getOpcode(); unsigned Opcode = MI.getOpcode();
LLT DstTy = MRI.getType(R); LLT DstTy = MRI.getType(R);
// Handle the case where this is called on a register that does not have a // Handle the case where this is called on a register that does not have a
▲ Show 20 Lines • Show All 366 Lines • ▼ Show 20 Lines case TargetOpcode::G_BSWAP: {
break; break;
} }
case TargetOpcode::G_BITREVERSE: { case TargetOpcode::G_BITREVERSE: {
Register SrcReg = MI.getOperand(1).getReg(); Register SrcReg = MI.getOperand(1).getReg();
computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1); computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1);
Known.reverseBits(); Known.reverseBits();
break; break;
} }
case TargetOpcode::G_UBFX: {
KnownBits SrcOpKnown, OffsetKnown, WidthKnown;
computeKnownBitsImpl(MI.getOperand(1).getReg(), SrcOpKnown, DemandedElts,
Depth + 1);
computeKnownBitsImpl(MI.getOperand(2).getReg(), OffsetKnown, DemandedElts,
Depth + 1);
computeKnownBitsImpl(MI.getOperand(3).getReg(), WidthKnown, DemandedElts,
Depth + 1);
Known = extractBits(BitWidth, SrcOpKnown, OffsetKnown, WidthKnown);
break;
}
case TargetOpcode::G_SBFX: {
KnownBits SrcOpKnown, OffsetKnown, WidthKnown;
computeKnownBitsImpl(MI.getOperand(1).getReg(), SrcOpKnown, DemandedElts,
foadUnsubmitted
Done
ReplyInline Actions

For example, instead of expanding the calculation "(1 << Width) - 1" literally here, I think you might get better results with something like:

KnownBits Mask;
Mask.Zero = APInt::getBitsSetFrom(BitWidth, WidthKnown.getMaxValue());
Mask.One = APInt::getLowBitsSet(BitWidth, WidthKnown.getMinValue());
foad: For example, instead of expanding the calculation "(1 << Width) - 1" literally here, I think…
bcahoonAuthorUnsubmitted
Done
ReplyInline Actions

Thanks for the suggestion. I use getBitsSetFrom/getLowBitsSet when the Width value is known. I think generating the mask explicitly or creating the literal calculation should generate the same results. But, when the width is known, it makes sense to just create the mask explicitly.

bcahoon: Thanks for the suggestion. I use getBitsSetFrom/getLowBitsSet when the Width value is known. I…
foadUnsubmitted
Done
ReplyInline Actions

I don't understand why WidthKnown.isUnknown() should be a special case. But you might need some strategic std::mins to avoid passing a value larger than BitWidth into getBitsSetFrom/getLowBitsSet.

foad: I don't understand why WidthKnown.isUnknown() should be a special case. But you might need some…
Depth + 1);
computeKnownBitsImpl(MI.getOperand(2).getReg(), OffsetKnown, DemandedElts,
Depth + 1);
RKSimonUnsubmitted
Not Done
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Are you going to have any issues here when Mask.hasConflict() is true?

RKSimon: Are you going to have any issues here when Mask.hasConflict() is true?
foadUnsubmitted
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That can only happen if WidthKnown.getMinValue() > WidthKnown.getMaxValue(), which I guess can only happen if WidthKnown.hasConflict() was already true. What are the rules about introducing or propagating conflicts?

foad: That can only happen if WidthKnown.getMinValue() > WidthKnown.getMaxValue(), which I guess can…
RKSimonUnsubmitted
Not Done
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Well, we do assert there is no conflict at the end of GISelKnownBits::computeKnownBitsImpl so we should be ensuring this doesn't happen.

RKSimon: Well, we do assert there is no conflict at the end of GISelKnownBits::computeKnownBitsImpl so…
foadUnsubmitted
Not Done
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Right, but I'm saying that this code can't produce a conflict out of thin air, only if one of the inputs already had a conflict, so I *think* it's OK. Would you agree?

foad: Right, but I'm saying that this code can't produce a conflict out of thin air, only if one of…
RKSimonUnsubmitted
Not Done
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Yes. I think you're right.

RKSimon: Yes. I think you're right.
bcahoonAuthorUnsubmitted
Done
ReplyInline Actions

I'm not sure what, if anything, needs to be done to handle a conflict here? Appreciate any suggestions.

bcahoon: I'm not sure what, if anything, needs to be done to handle a conflict here? Appreciate any…
computeKnownBitsImpl(MI.getOperand(3).getReg(), WidthKnown, DemandedElts,
Depth + 1);
Known = extractBits(BitWidth, SrcOpKnown, OffsetKnown, WidthKnown);
// Sign extend the extracted value using shift left and arithmetic shift
// right.
KnownBits ExtKnown = KnownBits::makeConstant(APInt(BitWidth, BitWidth));
KnownBits ShiftKnown = KnownBits::computeForAddSub(
/*Add*/ false, /*NSW*/ false, ExtKnown, WidthKnown);
RKSimonUnsubmitted
Done
ReplyInline Actions

Would it be clearer to handle G_SBFX/G_UBFX separately?

RKSimon: Would it be clearer to handle G_SBFX/G_UBFX separately?
Known = KnownBits::ashr(KnownBits::shl(Known, ShiftKnown), ShiftKnown);
break;
}
} }
assert(!Known.hasConflict() && "Bits known to be one AND zero?"); assert(!Known.hasConflict() && "Bits known to be one AND zero?");
LLVM_DEBUG(dumpResult(MI, Known, Depth)); LLVM_DEBUG(dumpResult(MI, Known, Depth));
// Update the cache. // Update the cache.
ComputeKnownBitsCache[R] = Known; ComputeKnownBitsCache[R] = Known;
} }
▲ Show 20 Lines • Show All 144 Lines • Show Last 20 Lines

llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp

Show First 20 Lines • Show All 1,664 Lines • ▼ Show 20 Lines)";
// Assert zero-extension from a 3-bit value. // Assert zero-extension from a 3-bit value.
Copy = MRI->getVRegDef(CopyAssert3); Copy = MRI->getVRegDef(CopyAssert3);
SrcReg = Copy->getOperand(1).getReg(); SrcReg = Copy->getOperand(1).getReg();
Res = Info.getKnownBits(SrcReg); Res = Info.getKnownBits(SrcReg);
EXPECT_EQ(64u, Res.getBitWidth()); EXPECT_EQ(64u, Res.getBitWidth());
EXPECT_EQ(0u, Res.One.getZExtValue()); EXPECT_EQ(0u, Res.One.getZExtValue());
EXPECT_EQ(0xFFFFFFFFFFFFFFF8u, Res.Zero.getZExtValue()); EXPECT_EQ(0xFFFFFFFFFFFFFFF8u, Res.Zero.getZExtValue());
} }
TEST_F(AMDGPUGISelMITest, TestKnownBitsUBFX) {
StringRef MIRString = " %3:_(s32) = G_IMPLICIT_DEF\n"
" %4:_(s32) = G_CONSTANT i32 12\n"
" %5:_(s32) = G_CONSTANT i32 8\n"
" %6:_(s32) = G_UBFX %3, %4(s32), %5\n"
" %ubfx_copy:_(s32) = COPY %6\n"
" %7:_(s32) = G_CONSTANT i32 28672\n"
" %8:_(s32) = G_UBFX %7, %4(s32), %5\n"
" %ubfx_copy_val:_(s32) = COPY %8\n"
" %9:_(s32) = G_IMPLICIT_DEF\n"
" %10:_(s32) = G_IMPLICIT_DEF\n"
" %11:_(s32) = G_UBFX %3, %9(s32), %10\n"
" %ubfx_copy_unk:_(s32) = COPY %11\n"
" %12:_(s32) = G_UBFX %3, %9(s32), %5\n"
" %ubfx_copy_unk_off:_(s32) = COPY %12\n"
" %13:_(s32) = G_UBFX %3, %4(s32), %10\n"
" %ubfx_copy_unk_width:_(s32) = COPY %13\n";
setUp(MIRString);
if (!TM)
return;
Register CopyBfxReg = Copies[Copies.size() - 5];
Register CopyValBfxReg = Copies[Copies.size() - 4];
Register CopyUnkBfxReg = Copies[Copies.size() - 3];
Register CopyUnkOffBfxReg = Copies[Copies.size() - 2];
Register CopyUnkWidthBfxReg = Copies[Copies.size() - 1];
MachineInstr *CopyBfx = MRI->getVRegDef(CopyBfxReg);
Register SrcReg = CopyBfx->getOperand(1).getReg();
MachineInstr *CopyValBfx = MRI->getVRegDef(CopyValBfxReg);
Register ValSrcReg = CopyValBfx->getOperand(1).getReg();
MachineInstr *CopyUnkBfx = MRI->getVRegDef(CopyUnkBfxReg);
Register UnkSrcReg = CopyUnkBfx->getOperand(1).getReg();
MachineInstr *CopyUnkOffBfx = MRI->getVRegDef(CopyUnkOffBfxReg);
Register UnkOffSrcReg = CopyUnkOffBfx->getOperand(1).getReg();
MachineInstr *CopyUnkWidthBfx = MRI->getVRegDef(CopyUnkWidthBfxReg);
Register UnkWidthSrcReg = CopyUnkWidthBfx->getOperand(1).getReg();
GISelKnownBits Info(*MF);
KnownBits Res1 = Info.getKnownBits(SrcReg);
EXPECT_EQ(0u, Res1.One.getZExtValue());
EXPECT_EQ(0xffffff00u, Res1.Zero.getZExtValue());
KnownBits Res2 = Info.getKnownBits(ValSrcReg);
EXPECT_EQ(7u, Res2.One.getZExtValue());
EXPECT_EQ(0xfffffff8u, Res2.Zero.getZExtValue());
KnownBits Res3 = Info.getKnownBits(UnkSrcReg);
EXPECT_EQ(0u, Res3.One.getZExtValue());
EXPECT_EQ(0u, Res3.Zero.getZExtValue());
KnownBits Res4 = Info.getKnownBits(UnkOffSrcReg);
EXPECT_EQ(0u, Res4.One.getZExtValue());
EXPECT_EQ(0xffffff00u, Res4.Zero.getZExtValue());
KnownBits Res5 = Info.getKnownBits(UnkWidthSrcReg);
EXPECT_EQ(0u, Res5.One.getZExtValue());
EXPECT_EQ(0xfff00000u, Res5.Zero.getZExtValue());
}
TEST_F(AMDGPUGISelMITest, TestKnownBitsSBFX) {
StringRef MIRString = " %3:_(s32) = G_IMPLICIT_DEF\n"
" %4:_(s32) = G_CONSTANT i32 8\n"
" %5:_(s32) = G_CONSTANT i32 4\n"
" %6:_(s32) = G_SBFX %3, %4(s32), %5\n"
" %sbfx_copy:_(s32) = COPY %6\n"
" %7:_(s32) = G_CONSTANT i32 2047\n"
" %8:_(s32) = G_SBFX %7, %4(s32), %5\n"
" %sbfx_copy_val:_(s32) = COPY %8\n"
" %9:_(s32) = G_CONSTANT i32 2048\n"
" %10:_(s32) = G_SBFX %9, %4(s32), %5\n"
" %sbfx_copy_neg_val:_(s32) = COPY %10\n"
" %11:_(s32) = G_IMPLICIT_DEF\n"
" %12:_(s32) = G_SBFX %7, %11(s32), %5\n"
" %sbfx_copy_unk_off:_(s32) = COPY %12\n"
" %13:_(s32) = G_SBFX %9, %4(s32), %11\n"
" %sbfx_copy_unk_width:_(s32) = COPY %13\n";
setUp(MIRString);
if (!TM)
return;
Register CopyBfxReg = Copies[Copies.size() - 5];
Register CopyValBfxReg = Copies[Copies.size() - 4];
Register CopyNegValBfxReg = Copies[Copies.size() - 3];
Register CopyUnkOffBfxReg = Copies[Copies.size() - 2];
Register CopyUnkWidthBfxReg = Copies[Copies.size() - 1];
MachineInstr *CopyBfx = MRI->getVRegDef(CopyBfxReg);
Register SrcReg = CopyBfx->getOperand(1).getReg();
MachineInstr *CopyValBfx = MRI->getVRegDef(CopyValBfxReg);
Register ValSrcReg = CopyValBfx->getOperand(1).getReg();
MachineInstr *CopyNegValBfx = MRI->getVRegDef(CopyNegValBfxReg);
Register NegValSrcReg = CopyNegValBfx->getOperand(1).getReg();
MachineInstr *CopyUnkOffBfx = MRI->getVRegDef(CopyUnkOffBfxReg);
Register UnkOffSrcReg = CopyUnkOffBfx->getOperand(1).getReg();
MachineInstr *CopyUnkWidthBfx = MRI->getVRegDef(CopyUnkWidthBfxReg);
Register UnkWidthSrcReg = CopyUnkWidthBfx->getOperand(1).getReg();
GISelKnownBits Info(*MF);
KnownBits Res1 = Info.getKnownBits(SrcReg);
EXPECT_EQ(0u, Res1.One.getZExtValue());
EXPECT_EQ(0u, Res1.Zero.getZExtValue());
KnownBits Res2 = Info.getKnownBits(ValSrcReg);
EXPECT_EQ(7u, Res2.One.getZExtValue());
EXPECT_EQ(0xfffffff8u, Res2.Zero.getZExtValue());
KnownBits Res3 = Info.getKnownBits(NegValSrcReg);
EXPECT_EQ(0xfffffff8u, Res3.One.getZExtValue());
EXPECT_EQ(7u, Res3.Zero.getZExtValue());
KnownBits Res4 = Info.getKnownBits(UnkOffSrcReg);
EXPECT_EQ(0u, Res4.One.getZExtValue());
EXPECT_EQ(0u, Res4.Zero.getZExtValue());
KnownBits Res5 = Info.getKnownBits(UnkWidthSrcReg);
EXPECT_EQ(0u, Res5.One.getZExtValue());
EXPECT_EQ(0u, Res5.Zero.getZExtValue());
}
TEST_F(AMDGPUGISelMITest, TestNumSignBitsUBFX) {
arsenmUnsubmitted
Done
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Can you also test computeNumSignBits? It may just work as is

arsenm: Can you also test computeNumSignBits? It may just work as is
StringRef MIRString = " %3:_(s32) = G_IMPLICIT_DEF\n"
" %4:_(s32) = G_CONSTANT i32 12\n"
" %5:_(s32) = G_CONSTANT i32 8\n"
" %6:_(s32) = G_UBFX %3, %4(s32), %5\n"
" %ubfx_copy_unk:_(s32) = COPY %6\n"
" %7:_(s32) = G_CONSTANT i32 28672\n"
" %8:_(s32) = G_UBFX %7, %4(s32), %5\n"
" %ubfx_copy_pos:_(s32) = COPY %8\n"
" %9:_(s32) = G_CONSTANT i32 -1\n"
" %10:_(s32) = G_UBFX %9, %4(s32), %5\n"
" %ubfx_copy_neg:_(s32) = COPY %10\n"
" %11:_(s32) = G_IMPLICIT_DEF\n"
" %12:_(s32) = G_UBFX %7, %11(s32), %5\n"
" %ubfx_copy_unk_off:_(s32) = COPY %12\n"
" %13:_(s32) = G_UBFX %7, %4(s32), %11\n"
" %ubfx_copy_unk_width:_(s32) = COPY %13\n";
setUp(MIRString);
if (!TM)
return;
Register CopyUnkBfxReg = Copies[Copies.size() - 5];
Register CopyPosBfxReg = Copies[Copies.size() - 4];
Register CopyNegBfxReg = Copies[Copies.size() - 3];
Register CopyUnkOffBfxReg = Copies[Copies.size() - 2];
Register CopyUnkWidthBfxReg = Copies[Copies.size() - 1];
GISelKnownBits Info(*MF);
EXPECT_EQ(24u, Info.computeNumSignBits(CopyUnkBfxReg));
EXPECT_EQ(29u, Info.computeNumSignBits(CopyPosBfxReg));
EXPECT_EQ(24u, Info.computeNumSignBits(CopyNegBfxReg));
EXPECT_EQ(24u, Info.computeNumSignBits(CopyUnkOffBfxReg));
EXPECT_EQ(29u, Info.computeNumSignBits(CopyUnkWidthBfxReg));
}
TEST_F(AMDGPUGISelMITest, TestNumSignBitsSBFX) {
StringRef MIRString = " %3:_(s32) = G_CONSTANT i32 -1\n"
" %4:_(s32) = G_CONSTANT i32 8\n"
" %5:_(s32) = G_CONSTANT i32 4\n"
" %6:_(s32) = G_SBFX %3, %4(s32), %5\n"
" %sbfx_copy_neg:_(s32) = COPY %6\n"
" %7:_(s32) = G_CONSTANT i32 2047\n"
" %8:_(s32) = G_SBFX %7, %4(s32), %5\n"
" %sbfx_copy_pos:_(s32) = COPY %8\n"
" %9:_(s32) = G_CONSTANT i32 2048\n"
" %10:_(s32) = G_SBFX %9, %4(s32), %5\n"
" %sbfx_copy_hiset:_(s32) = COPY %10\n"
" %11:_(s32) = G_IMPLICIT_DEF\n"
" %12:_(s32) = G_SBFX %11, %4(s32), %5\n"
" %sbfx_copy_unk:_(s32) = COPY %12\n"
" %13:_(s32) = G_SBFX %3, %11(s32), %5\n"
" %sbfx_copy_unk_off:_(s32) = COPY %13\n";
setUp(MIRString);
if (!TM)
return;
Register CopyNegBfxReg = Copies[Copies.size() - 5];
Register CopyPosBfxReg = Copies[Copies.size() - 4];
Register CopyHiSetBfxReg = Copies[Copies.size() - 3];
Register CopyUnkValBfxReg = Copies[Copies.size() - 2];
Register CopyUnkOffBfxReg = Copies[Copies.size() - 1];
GISelKnownBits Info(*MF);
EXPECT_EQ(32u, Info.computeNumSignBits(CopyNegBfxReg));
EXPECT_EQ(29u, Info.computeNumSignBits(CopyPosBfxReg));
EXPECT_EQ(29u, Info.computeNumSignBits(CopyHiSetBfxReg));
EXPECT_EQ(1u, Info.computeNumSignBits(CopyUnkValBfxReg));
EXPECT_EQ(1u, Info.computeNumSignBits(CopyUnkOffBfxReg));
}