neon: truncate(smin(smax(a,b),c)) --> vqmovns(a),truncate(smin(a,b)) --> vqmovnu(a)

[fantasyRqg]

Summary

• truncate(smin(smax(a,b),c)) --> vqmovns(a)
• truncate(umin(a,b)) --> vqmovnu(a)

[How to indicate LLVM use VQMOVN.s16 ](https://discuss.tvm.apache.org/t/how-to-indicate-llvm-use-vqmovn-s16/9682)

[fantasyRqg]

fix: wrong bit-width on PerformNeonTruncateMinMaxCombine::IsUnsignedSaturate

[fantasyRqg]

collect all change

[RKSimon]

X86 has some very similar code to recognise saturated trunc pattern matchers (detectUSatPattern + detectSSatPattern) - would it make sense to move them to SelectionDAG and reuse them here?

[fantasyRqg]

In D100938#2707735, @RKSimon wrote:

X86 has some very similar code to recognise saturated trunc pattern matchers (detectUSatPattern + detectSSatPattern) - would it make sense to move them to SelectionDAG and reuse them here?

I will take a look.
I need some time to understand TableGen.

[dmgreen]

Hello. Is it possible to just add a few tablegen patterns for there? As far as I can tell they are just a few nodes combined into one, and (unlike on MVE) we will not need to optimize them further.

[RKSimon]

In D100938#2707800, @fantasyRqg wrote:

In D100938#2707735, @RKSimon wrote:

X86 has some very similar code to recognise saturated trunc pattern matchers (detectUSatPattern + detectSSatPattern) - would it make sense to move them to SelectionDAG and reuse them here?

I will take a look.
I need some time to understand TableGen.

I didn't mean anything for TableGen - I just mention reusing the existing code (after moving to a generic location) instead of your IsSignedSaturate/IsUnsignedSaturate lambdas

.gitignore

 #OS X specific files.
 .DS_store
 
 # Ignore the user specified CMake presets in subproject directories.
 /*/CMakeUserPresets.json
 
 # Nested build directory
 /build*
+**/cmake-build*
 
 #==============================================================================#
 # Explicit files to ignore (only matches one).
 #==============================================================================#
 # Various tag programs
 /tags
 /TAGS
 /GPATH

llvm/lib/Target/ARM/ARMISelLowering.cpp

 //===- ARMISelLowering.cpp - ARM DAG Lowering Implementation --------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
static SDValue PerformNeonTruncateMinMaxCombine(SDNode *N, SelectionDAG &DAG,
 
   auto IsUnsignedSaturate = [&](SDNode *Min) {
     // For unsigned, we just need to check for <= 0xffff
     if (Min->getOpcode() != ISD::UMIN)
       return false;
 
     APInt SaturateC;
     if (VT == MVT::v8i8)
-      SaturateC = APInt(8, (1 << 8) - 1, true);
+      SaturateC = APInt(16, (1 << 8) - 1, true);
     else // if (VT == MVT::v4i16)
-      SaturateC = APInt(16, (1 << 16) - 1, true);
+      SaturateC = APInt(32, (1 << 16) - 1, true);
 
     APInt MinC;
     if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) ||
         MinC != SaturateC)
       return false;
     return true;
   };