[MIR][NFC] Introduce a new method to check a MachineInstr contains implicit register

[lkail]

Summary

The motivation of adding this method is suggestion from @shchenz when reviewing https://reviews.llvm.org/D85288.

When performing peephole optimization, after calling MI.setDesc the boundary between explicit operands and implicit operands might be changed, it's not feasible to call MI.implicit_operands().empty() to check if the MI contains any implicit operand in the mid of constructing a new MI.

[arsenm]

I don't think a helper that's only useful in the middle of a partial instruction modification is useful to generally expose

[arsenm]

This is also further confused by the two types of implicit operands. There are implicit physical register uses as present in the instruction definition, but also implicit uses that code can arbitrarily append to an instruction

llvm/include/llvm/CodeGen/MachineInstr.h

1864

This would early out earlier if you check from the back too

llvm/include/llvm/CodeGen/MachineInstr.h

   }
 
   void addPseudoProbeAttribute(PseudoProbeAttributes Attr) {
     assert(isPseudoProbe() && "Must be a pseudo probe instruction");
     MachineOperand &AttrOperand = getOperand(3);
     AttrOperand.setImm(AttrOperand.getImm() | (uint32_t)Attr);
   }
 
+  bool containsImplicitRegister() const {
+    return any_of(operands(), [](const MachineOperand &MO) {
+      return MO.isReg() && MO.isImplicit();
+    });
+  }
+
 private:
   /// If this instruction is embedded into a MachineFunction, return the
   /// MachineRegisterInfo object for the current function, otherwise
   /// return null.
   MachineRegisterInfo *getRegInfo();
 
   /// Unlink all of the register operands in this instruction from their
   /// respective use lists.  This requires that the operands already be on their