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Differential D100344

[mlir] Use MCJIT to fix integration tests
ClosedPublic

Authored by cota on Apr 12 2021, 2:24 PM.

Details

Reviewers
aartbik
nicolasvasilache
Commits
rG1310a19af062: [mlir] Use MCJIT to fix integration tests
Summary

Since c42c67ad ('Re-apply "[lli] Make -jit-kind=orc the default JIT
engine"'), ORC is the default JIT. Unfortunately, ORC seems to
ignore the --entry-function flag, which breaks all tests that
use the flag, namely the AMX and X86Vector integration tests.
This has been reported in PR#49906
(https://bugs.llvm.org/show_bug.cgi?id=49906).

Work around this by explicitly selecting MCJIT.

Diff Detail

Event Timeline

cota created this revision.Apr 12 2021, 2:24 PM
Herald added subscribers: dcaballe, teijeong, rdzhabarov and 15 others. · View Herald TranscriptApr 12 2021, 2:24 PM
cota requested review of this revision.Apr 12 2021, 2:24 PM
Herald added a reviewer: nicolasvasilache. · View Herald TranscriptApr 12 2021, 2:24 PM
Herald added a project: Restricted Project. · View Herald Transcript
Herald added subscribers: stephenneuendorffer, nicolasvasilache. · View Herald Transcript
aartbik accepted this revision.Apr 12 2021, 2:53 PM

aren't the AMX test affected by this as well then?

This revision is now accepted and ready to land.Apr 12 2021, 2:53 PM
Harbormaster completed remote builds in B98360: Diff 336964.Apr 12 2021, 3:00 PM
cota updated this revision to Diff 336974.Apr 12 2021, 3:09 PM

Fix AMX tests as well

cota added a comment.Apr 12 2021, 3:09 PM
In D100344#2684260, @aartbik wrote:

aren't the AMX test affected by this as well then?

They are indeed!
Fixed.

cota retitled this revision from [mlir] X86Vector: use MCJIT to fix integration tests to [mlir] Use MCJIT to fix integration tests.Apr 12 2021, 3:11 PM
cota edited the summary of this revision. (Show Details)
aartbik accepted this revision.Apr 12 2021, 3:26 PM

ship it!

mehdi_amini added a comment.Apr 12 2021, 3:48 PM

Ideally the bug should be referred as TODO in all these tests, and also these tests should be mentioned in the bug so that when closing the bug we update the tests back.

Harbormaster completed remote builds in B98370: Diff 336974.Apr 12 2021, 3:55 PM
cota updated this revision to Diff 337004.Apr 12 2021, 5:56 PM
cota edited the summary of this revision. (Show Details)

Add TODO comments that refer to the reported bug.

cota added a comment.Apr 12 2021, 6:01 PM
In D100344#2684413, @mehdi_amini wrote:

Ideally the bug should be referred as TODO in all these tests, and also these tests should be mentioned in the bug so that when closing the bug we update the tests back.

Done, thanks.

Harbormaster completed remote builds in B98393: Diff 337004.Apr 12 2021, 6:23 PM
Closed by commit rG1310a19af062: [mlir] Use MCJIT to fix integration tests (authored by cota, committed by aartbik). · Explain WhyApr 12 2021, 6:25 PM
This revision was automatically updated to reflect the committed changes.
aartbik added a commit: rG1310a19af062: [mlir] Use MCJIT to fix integration tests.
mehdi_amini added a comment.Apr 13 2021, 1:00 PM

The ORC bug is closed, can you update all these tests back to use ORC?

cota added a comment.Apr 13 2021, 1:15 PM
In D100344#2686777, @mehdi_amini wrote:

The ORC bug is closed, can you update all these tests back to use ORC?

Please see https://reviews.llvm.org/D100407.

Revision Contents

PathSize
mlir/
test/
Integration/
Dialect/
Vector/
CPU/
AMX/
3 lines
3 lines
3 lines
3 lines
3 lines
X86Vector/
3 lines
3 lines
3 lines

Diff 337015

mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
// Multiply into zeroed destination. // Multiply into zeroed destination.
func @kernel1(%arg0: memref<2x4xbf16>, func @kernel1(%arg0: memref<2x4xbf16>,
%arg1: memref<2x4xbf16>, %arg1: memref<2x4xbf16>,
%arg2: memref<2x2xf32>) { %arg2: memref<2x2xf32>) {
%0 = constant 0 : index %0 = constant 0 : index
▲ Show 20 Lines • Show All 71 Lines • Show Last 20 Lines

mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
func @print(%arg0: memref<16x4xi32>) { func @print(%arg0: memref<16x4xi32>) {
%iu = constant -1: i32 %iu = constant -1: i32
%c0 = constant 0: index %c0 = constant 0: index
%c1 = constant 1: index %c1 = constant 1: index
%c16 = constant 16: index %c16 = constant 16: index
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mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
// Multiply into zeroed destination. // Multiply into zeroed destination.
func @kernel1(%arg0: memref<2x8xi8>, func @kernel1(%arg0: memref<2x8xi8>,
%arg1: memref<2x8xi8>, %arg1: memref<2x8xi8>,
%arg2: memref<2x2xi32>) { %arg2: memref<2x2xi32>) {
%0 = constant 0 : index %0 = constant 0 : index
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mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
func @print(%arg0: memref<4x32xf32>) { func @print(%arg0: memref<4x32xf32>) {
%fu = constant -1.0: f32 %fu = constant -1.0: f32
%c0 = constant 0: index %c0 = constant 0: index
%c1 = constant 1: index %c1 = constant 1: index
%c4 = constant 4: index %c4 = constant 4: index
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mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-std-to-llvm | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
func @tilezero(%arg0: memref<?x?xi32>, %i: index, %j: index) { func @tilezero(%arg0: memref<?x?xi32>, %i: index, %j: index) {
%1 = amx.tile_zero : vector<16x16xi32> %1 = amx.tile_zero : vector<16x16xi32>
amx.tile_store %arg0[%i, %j], %1 : memref<?x?xi32>, vector<16x16xi32> amx.tile_store %arg0[%i, %j], %1 : memref<?x?xi32>, vector<16x16xi32>
return return
} }
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mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir

// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \ // RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="avx512bw" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
func @entry() -> i32 { func @entry() -> i32 {
%i0 = constant 0 : i32 %i0 = constant 0 : i32
%a = std.constant dense<[1., 0., 0., 2., 4., 3., 5., 7., 8., 1., 5., 5., 3., 1., 0., 7.]> : vector<16xf32> %a = std.constant dense<[1., 0., 0., 2., 4., 3., 5., 7., 8., 1., 5., 5., 3., 1., 0., 7.]> : vector<16xf32>
%k = std.constant dense<[1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0]> : vector<16xi1> %k = std.constant dense<[1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0]> : vector<16xi1>
%r1 = x86vector.avx512.mask.compress %k, %a : vector<16xf32> %r1 = x86vector.avx512.mask.compress %k, %a : vector<16xf32>
%r2 = x86vector.avx512.mask.compress %k, %a {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32> %r2 = x86vector.avx512.mask.compress %k, %a {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
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mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir

// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \ // RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// This test shows how to implement a sparse vector-vector dot product with // This test shows how to implement a sparse vector-vector dot product with
// AVX512. It uses vp2intersect, mask.compress and vector.contract to compute // AVX512. It uses vp2intersect, mask.compress and vector.contract to compute
// the dot product of two sparse HW vectors of 8 float64 elements ("segment"). // the dot product of two sparse HW vectors of 8 float64 elements ("segment").
// Each sparse vector is represented by an index memref (A or C) and by a data // Each sparse vector is represented by an index memref (A or C) and by a data
// memref (B or D), containing M or N elements. // memref (B or D), containing M or N elements.
// //
// There are four different implementations: // There are four different implementations:
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mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir

// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \ // RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \ // RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --jit-kind=mcjit --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// TODO: drop lli's --jit-kind flag once PR#49906 (https://bugs.llvm.org/show_bug.cgi?id=49906) is fixed.
// Note: To run this test, your CPU must support AVX512 vp2intersect. // Note: To run this test, your CPU must support AVX512 vp2intersect.
func @entry() -> i32 { func @entry() -> i32 {
%i0 = constant 0 : i32 %i0 = constant 0 : i32
%i1 = constant 1: i32 %i1 = constant 1: i32
%i2 = constant 2: i32 %i2 = constant 2: i32
%i3 = constant 7: i32 %i3 = constant 7: i32
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