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[MLIR][CUDA-RUNNER] Add CL options to pass SM version and index-bitwidth
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Authored by navdeepkk on Jan 24 2021, 11:21 PM.

Details

Reviewers
bondhugula
ftynse
Summary

Add a CL option to pass sm version in MLIR CUDA Runner. There are currently
no checks on the compatibility/validity of PTX and SM version. This is just naive addition
to check the working of WMMA tensor core operations. Add CL option to pass index-bitwidth
for LLVM lowering passes on the device side.

Diff Detail

Event Timeline

navdeepkk created this revision.Jan 24 2021, 11:21 PM
navdeepkk requested review of this revision.Jan 24 2021, 11:21 PM
ftynse accepted this revision.Jan 25 2021, 5:30 AM
This revision is now accepted and ready to land.Jan 25 2021, 5:30 AM
bondhugula accepted this revision.Jan 26 2021, 2:43 AM
navdeepkk updated this revision to Diff 321332.Feb 4 2021, 12:03 AM

Changes in this diff:-

1.) Add CL option to pass index-bitwidth for LLVM lowering passes
  on the device side.
navdeepkk retitled this revision from [MLIR][CUDA-RUNNER] Add CL option to pass SM version to [MLIR][CUDA-RUNNER] Add CL options to pass SM version and index-bitwidth.Feb 4 2021, 2:01 AM
navdeepkk edited the summary of this revision. (Show Details)
navdeepkk closed this revision.May 22 2021, 3:07 AM

Closing revision, As recent changes(removal of mlir-cuda-runner and others) have baked the functionality of this patch into convert-gpu-to-nvvm and gpu-to-cubin.