Register context information was already being passed into the DWARFDebugFrame code that dumps unwind information but it wasn't being used. This change adds the ability to dump registers names of a valid MC register context was passed in and if it knows about the register. Updated the tests to use the newly returned register names.
Our team maintains a downstream ARM target. The compiler, and indeed llvm-dwarfdump, are not built with the target used to build the object file queried here. Therefore, it does not know to use ESP or EIP and dumps reg4/reg8 instead.
Has any other downstream compiler seen this? I'm not able to access the buildbots right at the moment.
Specifically, here's the output from our lit test run with this change integrated into our downstream build:
llvm/test/DebugInfo/Inputs/dwarfdump-test-32bit.elf.o: No available targets are compatible with triple "i386-unknown-unknown" llvm/test/DebugInfo/Inputs/dwarfdump-test-32bit.elf.o: file format elf32-i386 .debug_frame contents: 00000000 00000010 ffffffff CIE Format: DWARF32 Version: 1 Augmentation: "" Code alignment factor: 1 Data alignment factor: -4 Return address column: 8 DW_CFA_def_cfa: reg4 +4 DW_CFA_offset: reg8 -4 DW_CFA_nop: DW_CFA_nop:
I suspect that if we really desire ESP/EIP, the test will need to be excluded when the i386 target is not available.
I didn't see any failures on the llvm buildbots that email me when they fail. The other patch will be merged as soon as accepted. Should be tomorrow morning.
Thanks! I think that the buildbot master was restarted recently and hence our worker wasn't able to generate an accurate blamelist. Otherwise everything seems fine.