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[RISCV] Implement intrinsics for XCVbitmanip extension in CV32E40P
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Authored by melonedo on Aug 9 2023, 7:36 AM.

Details

Summary

Implement XCVbitmanip intrinsics for CV32E40P according to the specification.

This commit is part of a patch-set to upstream the vendor specific extensions of CV32E40P that need LLVM intrinsics to implement Clang builtins.

Contributors: @CharKeaney, @jeremybennett, @lewis-revill, @liaolucy, Nandni Jamnadas, @PaoloS, @simoncook, @xmj.

Spec: https://github.com/openhwgroup/core-v-sw/blob/b69b8a487f8b0e4ab7e559d459cd0bbacab8adc9/specifications/corev-builtin-spec.md#listing-of-pulp-bit-manipulation-builtins-xcvbitmanip

Diff Detail

Event Timeline

melonedo created this revision.Aug 9 2023, 7:36 AM
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melonedo requested review of this revision.Aug 9 2023, 7:36 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 9 2023, 7:36 AM

Is there intended to be a header file that wraps the builtins? For other targets, builtins are considered an internal implementation detail and the real interface is the header file. I'm trying to get a C interface approved for Zb* and Zk* standard extenions https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44

llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
15

Use DefaultAttrsIntrinsic. Which I think includes IntrWillReturn

23

Use 2 space indentation

35

llvm.ctpop?

37

Can we use llvm.fshr like __builtin_rotateright32 does for this?

39

Can we use llvm.bitreverse?

llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
147 ↗(On Diff #548618)

Can we follow the established convention of having Pseudo at the beginning?

llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
522

Why do we need these pseudos? Looks like it just to split up the immediate? Can't we do that with an SDNodeXForm in tablegen?

melonedo updated this revision to Diff 549781.Aug 13 2023, 8:28 PM
  • Use DefaultAttrsIntrinsic
  • Implement LLVM intrinsics for ctpop/ctlz/cttz/ror/rol/bitreverse
  • Replace pseudo instructions for SDNodeXForm
melonedo marked 6 inline comments as done.Aug 13 2023, 8:39 PM

Is there intended to be a header file that wraps the builtins? For other targets, builtins are considered an internal implementation detail and the real interface is the header file. I'm trying to get a C interface approved for Zb* and Zk* standard extenions https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44

Discussions for this question are being hosted under https://github.com/openhwgroup/corev-llvm-project/issues/74. Before we reach a conclusion, I will implement these intrinsics in both versions, i.e., both llvm.ctpop and llvm.riscv.cv.bitmanip.cnt.

llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
39

cv.bitreverse is a generalization of llvm.bitreverse, which allows specifying number of higher bits to be ignored and number of bits grouped togather. For example, cv.bitreverse t0, t0, 23, 2 can transform octal 001 010 011 to 01 010 001.

Is there intended to be a header file that wraps the builtins? For other targets, builtins are considered an internal implementation detail and the real interface is the header file. I'm trying to get a C interface approved for Zb* and Zk* standard extenions https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44

Discussions for this question are being hosted under https://github.com/openhwgroup/corev-llvm-project/issues/74. Before we reach a conclusion, I will implement these intrinsics in both versions, i.e., both llvm.ctpop and llvm.riscv.cv.bitmanip.cnt.

We can have a builtin in the frontend that maps to a target independent intrinsic. We already do this for builtin_riscv_clz_32/64 and builtin_riscv_ctz_32/64.

melonedo marked an inline comment as done.Aug 13 2023, 8:58 PM
melonedo added inline comments.
llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
39

...octal 001 010 011 to 011 010 001.

craig.topper added inline comments.Aug 14 2023, 9:05 PM
llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
509

I think you can drop Operand from these.

510

Space before :

523

Drop the space before <

melonedo updated this revision to Diff 550190.Aug 14 2023, 9:24 PM

Fix formatting issues

melonedo updated this revision to Diff 551829.Aug 20 2023, 7:25 AM
melonedo marked 3 inline comments as done.

Remove CORE-V specific intrisics for cv.ff1/fl1/cnt/ror

From discussions last week, a header file for the C API will be included later as a public interface, which is tracked by https://github.com/openhwgroup/corev-gcc/issues/48 and https://github.com/openhwgroup/corev-llvm-project/issues/74. For LLVM intrisics level, since target-specific builtins can map to target-independent intrisics, I will implement these with LLVM target independent intrinsics.

melonedo updated this revision to Diff 558223.Sun, Dec 10, 5:49 AM

Rebase to latest main