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craig.topper (Craig Topper)
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Jul 30 2013, 7:58 PM (382 w, 2 d)

Recent Activity

Today

craig.topper committed rG8709d9d8724a: [RISCV] Replace getSimpleValueType() with getValueType() in DAG combines to… (authored by craig.topper).
[RISCV] Replace getSimpleValueType() with getValueType() in DAG combines to…
Fri, Nov 27, 12:49 PM
craig.topper committed rG29807a023ce5: [RISCV] Remove stale FIXMEs from a couple test cases. NFC (authored by craig.topper).
[RISCV] Remove stale FIXMEs from a couple test cases. NFC
Fri, Nov 27, 12:07 PM
craig.topper committed rGfa0f01a3c0e1: [RISCV][LegalizeTypes] Teach type legalizer that it can promote UMIN/UMAX using… (authored by craig.topper).
[RISCV][LegalizeTypes] Teach type legalizer that it can promote UMIN/UMAX using…
Fri, Nov 27, 11:39 AM
craig.topper closed D92128: [RISCV][LegalizeTypes] Teach type legalizer that it can promote UMIN/UMAX using SExtPromotedInteger if that's better for the target..
Fri, Nov 27, 11:39 AM · Restricted Project
craig.topper committed rGf325b4bbceb5: [RISCV] Replace sexti32/zexti32 in isel patterns where only one part of their… (authored by craig.topper).
[RISCV] Replace sexti32/zexti32 in isel patterns where only one part of their…
Fri, Nov 27, 11:39 AM

Yesterday

craig.topper accepted D92206: [msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics..

LGTM

Thu, Nov 26, 11:58 PM · Restricted Project
craig.topper committed rGe0481048abd3: [RISCV] Don't remove (and X, 0xffffffff) from inputs when matching RISCVISD… (authored by craig.topper).
[RISCV] Don't remove (and X, 0xffffffff) from inputs when matching RISCVISD…
Thu, Nov 26, 11:25 PM
craig.topper added inline comments to D92206: [msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics..
Thu, Nov 26, 11:18 PM · Restricted Project
craig.topper added inline comments to D92206: [msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics..
Thu, Nov 26, 11:17 PM · Restricted Project
craig.topper added a comment to D91331: Add hook for target to customize different legalization action according to the input type.

Could we check whether the input type is fp128 at the begining of PPCTargetLowering::LowerFP_TO_INT and if it is a fp128 input type, we directly ConvertNodeToLibcall?

I am not sure if this is feasible as ConvertNodeToLibcall is for legalizer not target lower.

Besides, I found a strange thing: In PPCTargetLowering::LowerFP_TO_INT, we will return original op if the input type is fp128, which means in some subtarget , fp128's fptoint is legal and have corresponding instructions. But what you are going to do is to do a hack and expand it to libcall at the beginning of legalizeOp(...). It seems there is a conflict here.

That is something that we did to fix the limitation of current setOperationAction mechanism and I am fine if we have any better solution for this... In fact, they are not conflict as the hook means that, expand it as libcall without querying the operation action as the operation action cannot handle the case that there are more than one input type.

We used to handle this by having it as custom and inside the hook, different the behavior by different return value. But we have no way to do something like this:

Legalize the sint_to_fp as libcall if the source type is fp128.

Any thoughts ?

Thu, Nov 26, 11:14 PM · Restricted Project
craig.topper added a comment to D92205: [RISCV] Remove DIVUW/REMUW patterns that don't seem right.

Though it probably isn't safe that we're matching (and X, 0xffffffff) on the input due to zexti32 handling both assertzext and and X, 0xffffffff. Removing an and seems wrong.

Thu, Nov 26, 9:41 PM · Restricted Project
craig.topper abandoned D92205: [RISCV] Remove DIVUW/REMUW patterns that don't seem right.

I misread that this was producing DIVU/REMU. Nevermind.

Thu, Nov 26, 9:38 PM · Restricted Project
craig.topper requested review of D92205: [RISCV] Remove DIVUW/REMUW patterns that don't seem right.
Thu, Nov 26, 9:31 PM · Restricted Project
craig.topper committed rG5836e5206376: [RISCV] Add isel patterns to use SBSET for (1 << X) by using X0 as the input. (authored by craig.topper).
[RISCV] Add isel patterns to use SBSET for (1 << X) by using X0 as the input.
Thu, Nov 26, 3:53 PM
craig.topper added a comment to D92154: [AArch64] Add custom lowering for ISD::ABS.

I am considering adding NABS. My original thought was that the DAG combine for NABS was unnecessary on some targets if we expanded to srai+xor+sub instead of srai+add+xor. The the neg and the sub would be free to combine on their own. Of course that doesnt work for targets with custom sequences but the custom sequences probably have better NABS forms anyway. Like csneg with an inverse condition. Or smin(neg)) on other targets. This is where a NABS node could be useful.

Thu, Nov 26, 12:04 PM · Restricted Project
craig.topper committed rGd9500c2e230e: [RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root. (authored by craig.topper).
[RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root.
Thu, Nov 26, 2:06 AM
craig.topper committed rG8fb8fb2c6077: [RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw… (authored by craig.topper).
[RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw…
Thu, Nov 26, 2:06 AM

Wed, Nov 25

craig.topper requested review of D92154: [AArch64] Add custom lowering for ISD::ABS.
Wed, Nov 25, 10:43 PM · Restricted Project
craig.topper committed rG2254e014a901: [RISCV] Add isel pattern to match (i64 (sra (shl X, 32), C)) to SRAIW if C > 32. (authored by craig.topper).
[RISCV] Add isel pattern to match (i64 (sra (shl X, 32), C)) to SRAIW if C > 32.
Wed, Nov 25, 10:06 PM
craig.topper added a reviewer for D92080: [Clang] Mutate long-double math builtins into f128 under IEEE-quad: efriedma.
Wed, Nov 25, 8:50 PM · Restricted Project
craig.topper committed rGf78ad68b6d8c: [RISCV] Remove unused PatFrag argument from the tablegen class used for c. (authored by craig.topper).
[RISCV] Remove unused PatFrag argument from the tablegen class used for c.
Wed, Nov 25, 8:36 PM
craig.topper committed rGaea130f7366b: [LegalizerTypes] Add support for scalarizing the operand of an FP_EXTEND when… (authored by craig.topper).
[LegalizerTypes] Add support for scalarizing the operand of an FP_EXTEND when…
Wed, Nov 25, 8:31 PM
craig.topper requested review of D92147: [RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump.
Wed, Nov 25, 6:12 PM · Restricted Project
craig.topper accepted D90738: [RISCV] Support Zfh half-precision floating-point extension..

LGTM

Wed, Nov 25, 3:59 PM · Restricted Project
craig.topper committed rGed95cafbc5fa: [RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd (authored by craig.topper).
[RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd
Wed, Nov 25, 3:22 PM
craig.topper closed D91987: [RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd.
Wed, Nov 25, 3:22 PM · Restricted Project
craig.topper committed rG2d6042937b04: [SelectionDAGBuilder] Add SPF_NABS support to visitSelect (authored by craig.topper).
[SelectionDAGBuilder] Add SPF_NABS support to visitSelect
Wed, Nov 25, 3:04 PM
craig.topper closed D92118: [SelectionDAGBuilder] Add SPF_NABS support to visitSelect.
Wed, Nov 25, 3:04 PM · Restricted Project
craig.topper requested review of D92128: [RISCV][LegalizeTypes] Teach type legalizer that it can promote UMIN/UMAX using SExtPromotedInteger if that's better for the target..
Wed, Nov 25, 1:05 PM · Restricted Project
craig.topper committed rG751b0d970e75: [RISCV] Make SMIN/SMAX/UMIN/UMAX legal with Zbb extension. (authored by craig.topper).
[RISCV] Make SMIN/SMAX/UMIN/UMAX legal with Zbb extension.
Wed, Nov 25, 12:49 PM
craig.topper committed rGbd0527f3942d: [RISCV] Add test cases to check that we use (smax X, (neg X)) for abs with Zbb… (authored by craig.topper).
[RISCV] Add test cases to check that we use (smax X, (neg X)) for abs with Zbb…
Wed, Nov 25, 12:49 PM
craig.topper added reviewers for D92118: [SelectionDAGBuilder] Add SPF_NABS support to visitSelect: lkail, steven.zhang.
Wed, Nov 25, 10:59 AM · Restricted Project
craig.topper requested review of D92118: [SelectionDAGBuilder] Add SPF_NABS support to visitSelect.
Wed, Nov 25, 10:57 AM · Restricted Project
craig.topper committed rG5654a3dd0add: [RISCV] Add test cases showing that we don't recognize the select form of NABS… (authored by craig.topper).
[RISCV] Add test cases showing that we don't recognize the select form of NABS…
Wed, Nov 25, 10:49 AM
craig.topper committed rGc26e8697d71e: [RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt. (authored by craig.topper).
[RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt.
Wed, Nov 25, 10:03 AM
craig.topper closed D91479: [RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt..
Wed, Nov 25, 10:02 AM · Restricted Project
craig.topper added a comment to D92080: [Clang] Mutate long-double math builtins into f128 under IEEE-quad.

gcc calls the *l version with -mlong-double-128 on x86. Should we match gcc here?

Wed, Nov 25, 9:55 AM · Restricted Project

Tue, Nov 24

craig.topper added inline comments to D91331: Add hook for target to customize different legalization action according to the input type.
Tue, Nov 24, 9:25 PM · Restricted Project
craig.topper added a reviewer for D91331: Add hook for target to customize different legalization action according to the input type: t.p.northover.
Tue, Nov 24, 9:10 PM · Restricted Project
craig.topper added inline comments to D91834: [SelectionDAG] Use TypeSize for the stack offset..
Tue, Nov 24, 7:10 PM · Restricted Project
craig.topper added inline comments to D90738: [RISCV] Support Zfh half-precision floating-point extension..
Tue, Nov 24, 6:44 PM · Restricted Project
craig.topper added inline comments to D89449: [RISCV] Initial infrastructure for code generation of the RISC-V V-extension.
Tue, Nov 24, 11:09 AM · Restricted Project
craig.topper added inline comments to D91927: [X86] Add x86_amx type for intel AMX..
Tue, Nov 24, 10:45 AM · Restricted Project, Restricted Project

Mon, Nov 23

craig.topper requested review of D92008: [RISCV][LegalizeDAG] Expand SETO and SETUO comparisons. Teach LegalizeDAG to expand SETUO expansion when UNE isn't legal..
Mon, Nov 23, 11:56 PM · Restricted Project
craig.topper added reviewers for D91987: [RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd: evandro, HsiangKai.
Mon, Nov 23, 5:11 PM · Restricted Project
craig.topper added a comment to D91927: [X86] Add x86_amx type for intel AMX..

I only took a quick pass through this so far. What happens if a bitcast between x86amx and v256i32(or any other 1024-bit vector type) exists in the IR but isn't next to a load/store?

@craig.topper , thank you for reviewing my patch.
I think if user just use our external API, such IR won't be generated. However if there is such IR, we can transform bitcast to <store, load>, so that the type can be translated through memory. One of <store, load> is AMX intrinsics store/load, so it won't be optimized. Is it reasonable?

Mon, Nov 23, 4:50 PM · Restricted Project, Restricted Project
craig.topper added a comment to D91927: [X86] Add x86_amx type for intel AMX..

I only took a quick pass through this so far. What happens if a bitcast between x86amx and v256i32(or any other 1024-bit vector type) exists in the IR but isn't next to a load/store?

Mon, Nov 23, 3:48 PM · Restricted Project, Restricted Project
craig.topper added inline comments to D91416: [VE] LVLGen sets VL before vector insts.
Mon, Nov 23, 3:24 PM · Restricted Project, Restricted Project
craig.topper committed rG03dab46d7f73: [RISCV] Remove unused VM register class (authored by craig.topper).
[RISCV] Remove unused VM register class
Mon, Nov 23, 2:27 PM
craig.topper closed D91977: [RISCV] Remove unused VM register class.
Mon, Nov 23, 2:27 PM · Restricted Project
craig.topper updated the diff for D91479: [RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt..

Address review comment

Mon, Nov 23, 11:57 AM · Restricted Project
craig.topper added inline comments to D91479: [RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt..
Mon, Nov 23, 11:53 AM · Restricted Project
craig.topper requested review of D91987: [RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd.
Mon, Nov 23, 11:51 AM · Restricted Project
craig.topper accepted D91877: [RISCV] Combine GREVI sequences.

LGTM

Mon, Nov 23, 11:39 AM · Restricted Project
craig.topper committed rGb3f1b19c9cec: [AArch64] Update clang CodeGen tests I missed in… (authored by craig.topper).
[AArch64] Update clang CodeGen tests I missed in…
Mon, Nov 23, 11:11 AM
craig.topper committed rG4252f7773a5b: [SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma… (authored by craig.topper).
[SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma…
Mon, Nov 23, 10:30 AM
craig.topper closed D91842: [SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma node in tablegen. Remove explicit commuted patterns from targets..
Mon, Nov 23, 10:30 AM · Restricted Project
craig.topper requested review of D91977: [RISCV] Remove unused VM register class.
Mon, Nov 23, 9:49 AM · Restricted Project

Sun, Nov 22

craig.topper added a comment to D91876: [DAG] Move vselect(icmp_ult, -1, add(x,y)) -> uaddsat(x,y) to DAGCombine (PR40111).

Why do we have v4i32 UADDSAT marked as Custom with SSE2, but then fail out of the LowerADDSAT_SUBSAT is UMIN isn't Legal, I think it needs SSE4.1?

Because we tag UMIN/UMAX as custom on SSE2 targets so the legalizer will try to use them - I'll see if we can remove that as well.

Sun, Nov 22, 11:16 PM · Restricted Project
craig.topper added a comment to D91931: [RISCV][GlobalISel] Select add i32, i32.

There's already a series of patches to add more GlobalISel support for RISCV. For example, https://reviews.llvm.org/D76445. The others can be found in the stack of patches attached to that one.

Sun, Nov 22, 11:09 AM · Restricted Project
craig.topper committed rG84b8222705c3: [RISCV] Use separate Lo and Hi MemOperands when expanding BuildPairF64Pseudo… (authored by craig.topper).
[RISCV] Use separate Lo and Hi MemOperands when expanding BuildPairF64Pseudo…
Sun, Nov 22, 1:08 AM

Sat, Nov 21

craig.topper added a comment to D91924: [X86] Have indirect calls take 64-bit operands in 64-bit modes.

Is there a test case?

Sat, Nov 21, 7:08 PM · Restricted Project
craig.topper updated the diff for D91479: [RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt..

Rebase

Sat, Nov 21, 3:57 PM · Restricted Project
craig.topper added inline comments to D91924: [X86] Have indirect calls take 64-bit operands in 64-bit modes.
Sat, Nov 21, 2:32 PM · Restricted Project
craig.topper updated the diff for D91842: [SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma node in tablegen. Remove explicit commuted patterns from targets..

Make fmad commutable as well. Looks like only AMDGPU uses it and I don't think they have patterns that care.

Sat, Nov 21, 12:38 AM · Restricted Project

Fri, Nov 20

craig.topper added a comment to D91876: [DAG] Move vselect(icmp_ult, -1, add(x,y)) -> uaddsat(x,y) to DAGCombine (PR40111).

Why do we have v4i32 UADDSAT marked as Custom with SSE2, but then fail out of the LowerADDSAT_SUBSAT is UMIN isn't Legal, I think it needs SSE4.1?

Fri, Nov 20, 10:53 PM · Restricted Project
craig.topper requested review of D91901: [RISCV] Move shift ComplexPatterns and custom isel to PatFrags with predicates.
Fri, Nov 20, 5:17 PM · Restricted Project
craig.topper added inline comments to D90973: [RISCV] Remove RV32 HwMode. Use DefaultMode for RV32.
Fri, Nov 20, 12:11 PM · Restricted Project
craig.topper committed rG9211da4215b6: [RISCV] Put RV32 before RV64 in the ValueTypeByHwMode and RegInfoByHwMode lists… (authored by craig.topper).
[RISCV] Put RV32 before RV64 in the ValueTypeByHwMode and RegInfoByHwMode lists…
Fri, Nov 20, 12:11 PM
craig.topper committed rG77e25b5bc886: [RISCV] Remove RV32 HwMode. Use DefaultMode for RV32 (authored by craig.topper).
[RISCV] Remove RV32 HwMode. Use DefaultMode for RV32
Fri, Nov 20, 11:16 AM
craig.topper closed D90973: [RISCV] Remove RV32 HwMode. Use DefaultMode for RV32.
Fri, Nov 20, 11:16 AM · Restricted Project
craig.topper added inline comments to D90973: [RISCV] Remove RV32 HwMode. Use DefaultMode for RV32.
Fri, Nov 20, 11:08 AM · Restricted Project
craig.topper added inline comments to D57059: [SLP] Initial support for the vectorization of the non-power-of-2 vectors..
Fri, Nov 20, 11:07 AM · Restricted Project
craig.topper committed rG6a1d8b91ed73: [RISCV] Custom type legalize i32 bswap/bitreverse to GREVIW on RV64 with Zbp… (authored by craig.topper).
[RISCV] Custom type legalize i32 bswap/bitreverse to GREVIW on RV64 with Zbp…
Fri, Nov 20, 10:41 AM
craig.topper closed D91457: [RISCV] Custom type legalize i32 bswap/bitreverse to GREVIW on RV64 with Zbp extension.
Fri, Nov 20, 10:41 AM · Restricted Project
craig.topper committed rG78767b7f8e8a: [RISCV] Add RISCVISD::ROLW/RORW use those for custom legalizing i32 rotl/rotr… (authored by craig.topper).
[RISCV] Add RISCVISD::ROLW/RORW use those for custom legalizing i32 rotl/rotr…
Fri, Nov 20, 10:26 AM
craig.topper closed D91449: [RISCV] Add RISCVISD::ROLW/RORW use those for custom legalizing i32 rotl/rotr on RV64IZbb..
Fri, Nov 20, 10:26 AM · Restricted Project
craig.topper added inline comments to D91877: [RISCV] Combine GREVI sequences.
Fri, Nov 20, 10:09 AM · Restricted Project
craig.topper committed rGa7eae62a4276: [SelectionDAG][X86][PowerPC][Mips] Replace the default implementation of… (authored by craig.topper).
[SelectionDAG][X86][PowerPC][Mips] Replace the default implementation of…
Fri, Nov 20, 10:07 AM
craig.topper closed D91846: [SelectionDAG][X86][PowerPC][Mips] Replace the default implementation of LowerOperationWrapper with the X86 and PowerPC version..
Fri, Nov 20, 10:07 AM · Restricted Project
craig.topper added inline comments to D91877: [RISCV] Combine GREVI sequences.
Fri, Nov 20, 10:03 AM · Restricted Project
craig.topper added a comment to D91449: [RISCV] Add RISCVISD::ROLW/RORW use those for custom legalizing i32 rotl/rotr on RV64IZbb..

LGTM. We can always revisit the grev/ror question as it applies both before and after this patch. At any rate, matching rotl/rotr to roli is a more logical default.

One thing: I'm surprised by the lack of test changes involving rol - are we missing some coverage?

Fri, Nov 20, 8:54 AM · Restricted Project
craig.topper added inline comments to D91840: OpaquePtr: Require byval on x86_intrcc parameter 0.
Fri, Nov 20, 12:15 AM · Restricted Project

Thu, Nov 19

craig.topper requested review of D91846: [SelectionDAG][X86][PowerPC][Mips] Replace the default implementation of LowerOperationWrapper with the X86 and PowerPC version..
Thu, Nov 19, 11:57 PM · Restricted Project
craig.topper requested review of D91842: [SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma node in tablegen. Remove explicit commuted patterns from targets..
Thu, Nov 19, 10:14 PM · Restricted Project
craig.topper added a comment to D90973: [RISCV] Remove RV32 HwMode. Use DefaultMode for RV32.

Any objections to me committing this?

Thu, Nov 19, 7:32 PM · Restricted Project
craig.topper added a reviewer for D91833: [SelectionDAG] Avoid aliasing analysis if the object size is unknown.: efriedma.
Thu, Nov 19, 5:52 PM · Restricted Project
craig.topper added a comment to D87981: [X86] AMX programming model..

Remind me what happened with the idea of using a dedicated type for tiles in IR like mmx?

Thu, Nov 19, 3:19 PM · Restricted Project, Restricted Project
craig.topper updated the diff for D91449: [RISCV] Add RISCVISD::ROLW/RORW use those for custom legalizing i32 rotl/rotr on RV64IZbb..

Rebase

Thu, Nov 19, 1:54 PM · Restricted Project
craig.topper added inline comments to D91038: [LoopIdiom] Introduce 'left-shift until bittest' idiom.
Thu, Nov 19, 1:51 PM · Restricted Project
craig.topper added a comment to D87981: [X86] AMX programming model..

This triggers an assertion in X86LowerAMXType::visit() when compiled with clang test.c -O3

Thu, Nov 19, 1:26 PM · Restricted Project, Restricted Project
craig.topper updated the diff for D91457: [RISCV] Custom type legalize i32 bswap/bitreverse to GREVIW on RV64 with Zbp extension.

Rebase

Thu, Nov 19, 12:41 PM · Restricted Project
craig.topper added a comment to D91730: [RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot.

Is the code change due to the fact that the optimizer later finally knows that 12(sp) and 8(sp) don't overlap?

Thu, Nov 19, 12:24 PM · Restricted Project

Wed, Nov 18

craig.topper committed rG6b0fc1f3c161: [RISCV] Add MemOperand to the instruction created by… (authored by craig.topper).
[RISCV] Add MemOperand to the instruction created by…
Wed, Nov 18, 7:22 PM
craig.topper closed D91730: [RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot.
Wed, Nov 18, 7:22 PM · Restricted Project
craig.topper accepted D90738: [RISCV] Support Zfh half-precision floating-point extension..

LGTM

Wed, Nov 18, 7:21 PM · Restricted Project
craig.topper added a comment to D91331: Add hook for target to customize different legalization action according to the input type.

I have to reopen this revision as the custom way still cannot meet PowerPC's requirement, because it will try to expand it first. From the implementation, it seems that we are trying our best to expand the node without checking the legalization of the expanded node, which results in several runtime call eventually. And sometimes, the expand never fall into libcall for some opcode ... See

case ISD::SINT_TO_FP:
case ISD::STRICT_SINT_TO_FP:
  Tmp1 = ExpandLegalINT_TO_FP(Node, Tmp2);
  Results.push_back(Tmp1);
  if (Node->isStrictFPOpcode())
    Results.push_back(Tmp2);
  break;

What we are trying to do is to call the runtime call for such operations.

Address Reviewer's comments.

Wed, Nov 18, 7:09 PM · Restricted Project
craig.topper added a reviewer for D91730: [RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot: HsiangKai.
Wed, Nov 18, 12:23 PM · Restricted Project
craig.topper requested review of D91730: [RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot.
Wed, Nov 18, 11:32 AM · Restricted Project
craig.topper added inline comments to D91726: [LoopIdiom] 'left-shift until bittest' idiom: support canonical sign bit mask.
Wed, Nov 18, 10:51 AM · Restricted Project