- User Since
- Jul 30 2013, 7:58 PM (382 w, 2 d)
Though it probably isn't safe that we're matching (and X, 0xffffffff) on the input due to zexti32 handling both assertzext and and X, 0xffffffff. Removing an and seems wrong.
I misread that this was producing DIVU/REMU. Nevermind.
I am considering adding NABS. My original thought was that the DAG combine for NABS was unnecessary on some targets if we expanded to srai+xor+sub instead of srai+add+xor. The the neg and the sub would be free to combine on their own. Of course that doesnt work for targets with custom sequences but the custom sequences probably have better NABS forms anyway. Like csneg with an inverse condition. Or smin(neg)) on other targets. This is where a NABS node could be useful.
Wed, Nov 25
gcc calls the *l version with -mlong-double-128 on x86. Should we match gcc here?
Tue, Nov 24
Mon, Nov 23
I only took a quick pass through this so far. What happens if a bitcast between x86amx and v256i32(or any other 1024-bit vector type) exists in the IR but isn't next to a load/store?
Address review comment
Sun, Nov 22
There's already a series of patches to add more GlobalISel support for RISCV. For example, https://reviews.llvm.org/D76445. The others can be found in the stack of patches attached to that one.
Sat, Nov 21
Is there a test case?
Make fmad commutable as well. Looks like only AMDGPU uses it and I don't think they have patterns that care.
Fri, Nov 20
Why do we have v4i32 UADDSAT marked as Custom with SSE2, but then fail out of the LowerADDSAT_SUBSAT is UMIN isn't Legal, I think it needs SSE4.1?
Thu, Nov 19
Any objections to me committing this?
Remind me what happened with the idea of using a dedicated type for tiles in IR like mmx?
This triggers an assertion in X86LowerAMXType::visit() when compiled with clang test.c -O3
Wed, Nov 18