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fhahn (Florian Hahn)
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Aug 18 2016, 4:39 AM (222 w, 4 d)

Recent Activity

Today

fhahn added a comment to D90445: [SLP] Make SLPVectorizer to use `llvm.masked.gather` intrinsic.

I believe this issue is related to the default cost for getGatherScatterOpCost(). For the arch not having gather/scatter instrs we use TargetTransformInfoImplBase::getGatherScatterOpCost() which returns 1 unconditionally: https://github.com/llvm/llvm-project/blob/release/11.x/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h#L480
I'd fix it by setting something like 1024 for the default cost.

Mon, Nov 23, 11:02 AM · Restricted Project
fhahn requested review of D91984: [CostModel] Add basic implementation of getGatherScatterOpCost..
Mon, Nov 23, 11:01 AM · Restricted Project
fhahn committed rG14c0185bfeb6: [AArch64] Add scatter cost model tests. (authored by fhahn).
[AArch64] Add scatter cost model tests.
Mon, Nov 23, 10:39 AM
fhahn committed rG3a1c6cec15e3: [AArch64] Add tests for masked.gather costs. (authored by fhahn).
[AArch64] Add tests for masked.gather costs.
Mon, Nov 23, 9:36 AM
fhahn added a comment to D90445: [SLP] Make SLPVectorizer to use `llvm.masked.gather` intrinsic.

It appears this is causing a ~2-3% regression on AArch64 for some benchmarks, including CINT2000/256.bzip2. Any ideas? It might be caused by underestimating the cost of gather/scatter on AArch64.

Mon, Nov 23, 6:09 AM · Restricted Project
fhahn added inline comments to D88382: [VPlan] Turn VPReductionRecipe into a VPValue.
Mon, Nov 23, 2:54 AM · Restricted Project

Yesterday

fhahn accepted D88447: [VPlan] Switch VPWidenRecipe to be a VPValue.

LGTM, thanks!

Sun, Nov 22, 6:26 AM · Restricted Project
fhahn added inline comments to D90564: [VPlan] Make VPRecipeBase inherit from VPDef..
Sun, Nov 22, 6:19 AM · Restricted Project
fhahn updated the diff for D90560: [VPlan] Use VPDef for VPWidenSelectRecipe..

Rebase after all dependent patches landed & ping :)

Sun, Nov 22, 6:14 AM · Restricted Project
fhahn updated the diff for D90559: [VPlan] Use VPdef for VPWidenCall..

Rebase after all dependent patches landed & ping :)

Sun, Nov 22, 6:14 AM · Restricted Project
fhahn updated the diff for D90565: [VPlan] Make VPInstruction a VPDef.

Remove now obsolete toVPValue.

Sun, Nov 22, 6:12 AM · Restricted Project

Thu, Nov 19

fhahn committed rG7fa14a7c690e: [ConstraintElimination] Decompose GEP with arbitrary offsets. (authored by fhahn).
[ConstraintElimination] Decompose GEP with arbitrary offsets.
Thu, Nov 19, 2:49 PM
fhahn committed rG7f4d88a1fa6b: [ConstraintElimination] Add GEP test case with variable offset. (authored by fhahn).
[ConstraintElimination] Add GEP test case with variable offset.
Thu, Nov 19, 6:08 AM
fhahn added a comment to D91574: [libc++] Simplify how we pick the typeinfo comparison.

This seems to have broken no-op rebuild w/ existing build dir:

CMake Error at /repositories/llvm-project/libcxx/CMakeLists.txt:187 (message):
  Value '' is not a valid value for

                         LIBCXX_TYPEINFO_COMPARISON_IMPLEMENTATION


-- Configuring incomplete, errors occurred!

It seems to work after i manually specify -DLIBCXX_TYPEINFO_COMPARISON_IMPLEMENTATION=default, but still..

Thu, Nov 19, 1:52 AM · Restricted Project
fhahn committed rG1983acce7c4d: [SelDAGBuilder] Do not require simple VTs for constraints. (authored by fhahn).
[SelDAGBuilder] Do not require simple VTs for constraints.
Thu, Nov 19, 1:41 AM
fhahn closed D91710: [SelDAGBuilder] Do not require simple VTs for constraints..
Thu, Nov 19, 1:41 AM · Restricted Project
fhahn accepted D91518: [LV][NFC-ish] Allow vector widths over 256 elements.

I thought it's a good idea when I hear it from @fhahn, but... I think It's not a good idea since 1) WidestRegister holds bit width, 2) MaxVectorSize is calculated from TTI->getRegisterBitWidth anyway.

Thu, Nov 19, 1:37 AM · Restricted Project

Wed, Nov 18

fhahn committed rG2fead1ac61f8: [ConstraintElimination] Decompose add nuw/sub nuw. (authored by fhahn).
[ConstraintElimination] Decompose add nuw/sub nuw.
Wed, Nov 18, 12:30 PM
fhahn added inline comments to D91398: [LoopVectorizer] Lower uniform loads as a single load (instead of relying on CSE).
Wed, Nov 18, 12:28 PM · Restricted Project
fhahn added inline comments to D91682: [LoopInterchange] Fix the checking of tightly nested loop.
Wed, Nov 18, 12:13 PM · Restricted Project
fhahn added inline comments to D91518: [LV][NFC-ish] Allow vector widths over 256 elements.
Wed, Nov 18, 12:02 PM · Restricted Project
fhahn requested review of D91710: [SelDAGBuilder] Do not require simple VTs for constraints..
Wed, Nov 18, 7:16 AM · Restricted Project
fhahn committed rGa8a79c90699a: [ConstraintElimination] Refactor constraint extraction (NFC). (authored by fhahn).
[ConstraintElimination] Refactor constraint extraction (NFC).
Wed, Nov 18, 6:00 AM
fhahn committed rG680931af2757: [Matrix] Adjust matrix pointer type for inline asm arguments. (authored by fhahn).
[Matrix] Adjust matrix pointer type for inline asm arguments.
Wed, Nov 18, 3:45 AM
fhahn closed D91631: [Matrix] Adjust matrix pointer type for inline asm arguments..
Wed, Nov 18, 3:44 AM · Restricted Project
fhahn added a comment to D91250: Support intrinsic overloading on unnamed types.

I think we would also need tests for combining multiple modules with intrinsics with unnamed type.

Wed, Nov 18, 2:30 AM · Restricted Project
fhahn accepted D88382: [VPlan] Turn VPReductionRecipe into a VPValue.

LGTM, thanks!

Wed, Nov 18, 1:47 AM · Restricted Project

Tue, Nov 17

fhahn added a comment to D88735: [SLP] Also try to vectorize incoming values of PHIs ..

This seems to fail if one of the predecessors to the PHI block is dead and contain weird stuff e.g. like this:

Thanks for the example. I added an unreachable code bailout to avoid the bug:
08834979

Tue, Nov 17, 1:52 PM · Restricted Project
fhahn added a comment to D91631: [Matrix] Adjust matrix pointer type for inline asm arguments..

There's still one remaining issue. The backend will still crash when the resulting vector does not fit into the target's vector register directly. But that's the same as with ext_vector_type I think. The snippet below should produce the same asm call as a float x 3 x 3 matrix.

Tue, Nov 17, 9:59 AM · Restricted Project
fhahn committed rG52f3714dae7b: [VPlan] Add VPDef class. (authored by fhahn).
[VPlan] Add VPDef class.
Tue, Nov 17, 8:19 AM
fhahn closed D90558: [VPlan] Add VPDef class..
Tue, Nov 17, 8:18 AM · Restricted Project
fhahn added reviewers for D91631: [Matrix] Adjust matrix pointer type for inline asm arguments.: anemet, rjmccall, nickdesaulniers, glider.
Tue, Nov 17, 7:27 AM · Restricted Project
fhahn requested review of D91631: [Matrix] Adjust matrix pointer type for inline asm arguments..
Tue, Nov 17, 7:23 AM · Restricted Project
fhahn added a comment to D90445: [SLP] Make SLPVectorizer to use `llvm.masked.gather` intrinsic.

It looks like this change may cause a crash when building LNT, e.g. http://lab.llvm.org:8011/#/builders/105/builds/1899/steps/7/logs/stdio

Tue, Nov 17, 7:19 AM · Restricted Project
fhahn committed rG46846ac45b2c: [Matrix] Add inline assembly test case. (authored by fhahn).
[Matrix] Add inline assembly test case.
Tue, Nov 17, 7:13 AM
fhahn abandoned D85344: [ConstraintElimination] Add support for And..
Tue, Nov 17, 6:13 AM · Restricted Project
fhahn committed rG13042da5cb3f: [ConstraintElimination] Add support for And. (authored by fhahn).
[ConstraintElimination] Add support for And.
Tue, Nov 17, 6:12 AM
fhahn added inline comments to D90040: [AsmPrinter] Use getMnemonic for instruction-mix remark..
Tue, Nov 17, 5:58 AM · Restricted Project
fhahn committed rGa9adb62a6406: [AsmPrinter] Use getMnemonic for instruction-mix remark. (authored by fhahn).
[AsmPrinter] Use getMnemonic for instruction-mix remark.
Tue, Nov 17, 4:13 AM
fhahn closed D90040: [AsmPrinter] Use getMnemonic for instruction-mix remark..
Tue, Nov 17, 4:13 AM · Restricted Project
fhahn added a comment to D90039: [AsmWriter] Factor out mnemonic generation to accessible getMnemonic..

Thanks everyone for taking a look at this one!

Tue, Nov 17, 1:49 AM · Restricted Project
fhahn committed rGb2f4c5fddc76: [AsmWriter] Factor out mnemonic generation to accessible getMnemonic. (authored by fhahn).
[AsmWriter] Factor out mnemonic generation to accessible getMnemonic.
Tue, Nov 17, 1:48 AM
fhahn closed D90039: [AsmWriter] Factor out mnemonic generation to accessible getMnemonic..
Tue, Nov 17, 1:48 AM · Restricted Project
fhahn updated the summary of D90558: [VPlan] Add VPDef class..
Tue, Nov 17, 1:41 AM · Restricted Project

Mon, Nov 16

fhahn added a comment to D90040: [AsmPrinter] Use getMnemonic for instruction-mix remark..

ping :)

Mon, Nov 16, 2:01 PM · Restricted Project
fhahn committed rG5a4ca8b550af: [ConstraintElimination] Add support for Or. (authored by fhahn).
[ConstraintElimination] Add support for Or.
Mon, Nov 16, 1:49 PM
fhahn abandoned D85343: [ConstraintElimination] Add support for Or..
Mon, Nov 16, 1:43 PM · Restricted Project
fhahn committed rG15beb4e2365c: [ConstraintElimination] Add complex test cases. (authored by fhahn).
[ConstraintElimination] Add complex test cases.
Mon, Nov 16, 11:56 AM
fhahn added a comment to D91195: Add Annotation2MD pass to add !annotate metadata from llvm.global.annotations.

Thanks Jessica & Francis! I committed the initial version, with a small change to only run if the !annotation remarks are enabled.

Mon, Nov 16, 7:17 AM · Restricted Project, Restricted Project
fhahn committed rG8dbe44cb2936: Add pass to add !annotate metadata from @llvm.global.annotations. (authored by fhahn).
Add pass to add !annotate metadata from @llvm.global.annotations.
Mon, Nov 16, 6:58 AM
fhahn closed D91195: Add Annotation2MD pass to add !annotate metadata from llvm.global.annotations.
Mon, Nov 16, 6:58 AM · Restricted Project, Restricted Project
fhahn committed rGca2e7e59994d: [IRGen] Add !annotation metadata for auto-init stores. (authored by fhahn).
[IRGen] Add !annotation metadata for auto-init stores.
Mon, Nov 16, 2:42 AM
fhahn closed D91417: [IRGen] Add !annotation metadata for auto-init stores..
Mon, Nov 16, 2:42 AM · Restricted Project, Restricted Project
fhahn added inline comments to D91417: [IRGen] Add !annotation metadata for auto-init stores..
Mon, Nov 16, 2:39 AM · Restricted Project, Restricted Project
fhahn added a reviewer for D91417: [IRGen] Add !annotation metadata for auto-init stores.: jfb.
Mon, Nov 16, 2:29 AM · Restricted Project, Restricted Project

Sun, Nov 15

fhahn abandoned D88379: [VPlan] Make VPRecipeBase a VPValue (WIP)..

This patch is superseded by the VPDef approach in D90558

Sun, Nov 15, 12:00 PM · Restricted Project
fhahn abandoned D88380: [VPlan] Extend VPValue to also model sub- & 'virtual' values..

Thanks for all the feedback. I'd propose to continue the discussion at the VPDef proposal (D90558). I'll abandon this one now, to avoid any confusion.

Sun, Nov 15, 11:59 AM · Restricted Project
fhahn abandoned D87752: [VPlan] Add VPMultiValue..

Superseded by the VPDef approach as outlined in D90558

Sun, Nov 15, 11:55 AM · Restricted Project
fhahn added inline comments to D88382: [VPlan] Turn VPReductionRecipe into a VPValue.
Sun, Nov 15, 11:33 AM · Restricted Project
fhahn added inline comments to D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..
Sun, Nov 15, 10:04 AM · Restricted Project
fhahn committed rG7fa8b629208c: [MemorySSA] Add pointer decrement loop clobber test case. (authored by fhahn).
[MemorySSA] Add pointer decrement loop clobber test case.
Sun, Nov 15, 10:01 AM
fhahn added inline comments to D90558: [VPlan] Add VPDef class..
Sun, Nov 15, 9:58 AM · Restricted Project
fhahn updated the diff for D90558: [VPlan] Add VPDef class..

This looks good to me, thanks!

Sun, Nov 15, 9:57 AM · Restricted Project
fhahn added inline comments to D91398: [LoopVectorizer] Lower uniform loads as a single load (instead of relying on CSE).
Sun, Nov 15, 9:54 AM · Restricted Project
fhahn requested review of D91501: [VPlan] VPTransformState::get() can always return lane 0 for uniforms..
Sun, Nov 15, 9:31 AM · Restricted Project
fhahn requested review of D91500: [VPlan] Turn VPReplicateRecipe into a VPValue..
Sun, Nov 15, 9:21 AM · Restricted Project
fhahn committed rG0c119ba8a8e5: [VPlan] Use VPValue def for VPWidenGEPRecipe. (authored by fhahn).
[VPlan] Use VPValue def for VPWidenGEPRecipe.
Sun, Nov 15, 7:13 AM
fhahn closed D84683: [VPlan] Use VPValue def for VPWidenGEPRecipe..
Sun, Nov 15, 7:13 AM · Restricted Project
fhahn updated the diff for D84683: [VPlan] Use VPValue def for VPWidenGEPRecipe..

address remaining comment, rebase

Sun, Nov 15, 6:57 AM · Restricted Project
fhahn added inline comments to D90565: [VPlan] Make VPInstruction a VPDef.
Sun, Nov 15, 5:14 AM · Restricted Project
fhahn updated the diff for D90565: [VPlan] Make VPInstruction a VPDef.

Remove obsolete isVoidTy check.

Sun, Nov 15, 5:02 AM · Restricted Project
fhahn added inline comments to D90558: [VPlan] Add VPDef class..
Sun, Nov 15, 3:54 AM · Restricted Project
fhahn updated the diff for D90558: [VPlan] Add VPDef class..

Fix comment, expand VPDef doc-comment to state VPDefs own their defined VPValues and are responsible for deleting them. Also mention inheritance order when inheriting from both VPValue and VPDef.

Sun, Nov 15, 3:54 AM · Restricted Project

Sat, Nov 14

fhahn added a comment to D90558: [VPlan] Add VPDef class..

I realised I added a couple of response I didn't submit. Here they are

Sat, Nov 14, 2:55 PM · Restricted Project
fhahn added a comment to D91398: [LoopVectorizer] Lower uniform loads as a single load (instead of relying on CSE).

There's D68831 which is potentially related and tries to extend the logic to consider loop-invariant ops as uniform. I suppose I need to rebase it again....

Sat, Nov 14, 12:19 PM · Restricted Project
fhahn added a reverting change for rGc8d73d939fa4: Revert "[VPlan] Use VPValue def for VPWidenSelectRecipe.": rGa70b511e7802: Recommit "[VPlan] Use VPValue def for VPWidenSelectRecipe.".
Sat, Nov 14, 12:18 PM
fhahn committed rGa70b511e7802: Recommit "[VPlan] Use VPValue def for VPWidenSelectRecipe." (authored by fhahn).
Recommit "[VPlan] Use VPValue def for VPWidenSelectRecipe."
Sat, Nov 14, 12:18 PM
fhahn added inline comments to D91398: [LoopVectorizer] Lower uniform loads as a single load (instead of relying on CSE).
Sat, Nov 14, 12:17 PM · Restricted Project
fhahn added a comment to D91481: [LoopUnroll] Discount uniform instructions in cost models.

Reviewers, I am not entirely sure this is the right approach. The obvious alternative is to generalize the full unrolling cost model to handle partial unrolling. As detailed below, the alternative looks non-trivial, and I decided against it. I do see the argument for that being the right approach though, so if you want to just reject this patch outright, I won't argue.

Sat, Nov 14, 11:56 AM · Restricted Project

Fri, Nov 13

fhahn added a comment to D91444: [InstCombine] Preserve !annotation metadata for memory combines..

Can you please add a link to the patches/maillist disscussions about said annotation?
What about teaching IRBuilder to deal with it like it deals with debugloc?

Fri, Nov 13, 10:19 AM · Restricted Project
fhahn updated the summary of D91444: [InstCombine] Preserve !annotation metadata for memory combines..
Fri, Nov 13, 10:19 AM · Restricted Project
fhahn requested review of D91444: [InstCombine] Preserve !annotation metadata for memory combines..
Fri, Nov 13, 9:49 AM · Restricted Project
fhahn updated the diff for D90558: [VPlan] Add VPDef class..

Thanks for taking a look! Addressed the comments & also added a bit more comments and updated VectorizationPlan.rst

Fri, Nov 13, 8:43 AM · Restricted Project
fhahn requested review of D91417: [IRGen] Add !annotation metadata for auto-init stores..
Fri, Nov 13, 5:34 AM · Restricted Project, Restricted Project
fhahn committed rG8bb6347939b7: Add !annotation metadata and remarks pass. (authored by fhahn).
Add !annotation metadata and remarks pass.
Fri, Nov 13, 5:26 AM
fhahn closed D91188: Add !annotation metadata and remarks pass..
Fri, Nov 13, 5:26 AM · Restricted Project
fhahn committed rG35e461ae2b31: [docs] Fix undefined reference in ORCv2 design doc. (authored by fhahn).
[docs] Fix undefined reference in ORCv2 design doc.
Fri, Nov 13, 1:45 AM

Thu, Nov 12

fhahn committed rGc1f6f300404a: [PatternMatch] Add single index InsertValue matcher. (authored by fhahn).
[PatternMatch] Add single index InsertValue matcher.
Thu, Nov 12, 1:27 PM
fhahn closed D91352: [PatternMatch] Add single index InsertValue matcher..
Thu, Nov 12, 1:27 PM · Restricted Project
fhahn added inline comments to D91352: [PatternMatch] Add single index InsertValue matcher..
Thu, Nov 12, 12:38 PM · Restricted Project
fhahn added a comment to D91346: [AArch64] Add FCMLA AArch64ISD node..

Sounds OK, but I think there's such a thing as splitting up a patch too much! And if it's not possible to add tests for something, that can be a bad sign.

Thu, Nov 12, 9:06 AM · Restricted Project
fhahn requested review of D91354: [AArch64] Lower @llvm.complex.multiply using fcmla (WIP)..
Thu, Nov 12, 7:14 AM · Restricted Project
fhahn requested review of D91353: [CodeGenPrepare] Match complex multiply pattern (WIP)..
Thu, Nov 12, 7:07 AM · Restricted Project
fhahn requested review of D91352: [PatternMatch] Add single index InsertValue matcher..
Thu, Nov 12, 6:47 AM · Restricted Project
fhahn requested review of D91347: [IR] Add @llvm.complex.multiply intrinsic (WIP).
Thu, Nov 12, 6:28 AM · Restricted Project
fhahn requested review of D91346: [AArch64] Add FCMLA AArch64ISD node..
Thu, Nov 12, 6:27 AM · Restricted Project
fhahn requested review of D91345: [AArch64] Fix rottype use in complex instr defs..
Thu, Nov 12, 6:25 AM · Restricted Project

Wed, Nov 11

fhahn committed rG1d5daed1997d: [Matrix] Update mangling to use paramterized vendor ext type syntax. (authored by fhahn).
[Matrix] Update mangling to use paramterized vendor ext type syntax.
Wed, Nov 11, 1:39 PM
fhahn closed D91253: [Matrix] Update mangling to use paramterized vendor ext type syntax..
Wed, Nov 11, 1:39 PM · Restricted Project
fhahn added inline comments to D91253: [Matrix] Update mangling to use paramterized vendor ext type syntax..
Wed, Nov 11, 11:39 AM · Restricted Project