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dmgreen (Dave Green)
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User Since
May 24 2016, 8:35 AM (220 w, 3 d)

Recent Activity

Today

dmgreen accepted D82091: [ARM][CostModel] Select instruction costs..

OK thanks,

Fri, Aug 14, 11:20 AM · Restricted Project
dmgreen added a comment to D79783: [LV] Fallback strategies if tail-folding fails.

@SjoerdMeijer I ran into a potential use for this patch in the reduction code I was working on. I think this looks good in general I just had a question about the fallback stratergy.

Fri, Aug 14, 11:05 AM · Restricted Project
dmgreen updated the diff for D84741: [LV] Allow tail folded reduction selects to remain in the loop.

Now just the Vectorizer part and an option to test it with, plus a new test.

Fri, Aug 14, 10:54 AM · Restricted Project
dmgreen requested review of D85980: [ARM][LV] Add a preferPredicatedReductionSelect target hook.
Fri, Aug 14, 10:54 AM · Restricted Project

Yesterday

dmgreen added a comment to D83667: [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz.

OK, Thanks. I can see how that one would be wrong. Thanks for the example! We'll see what we can do.

Thu, Aug 13, 11:59 PM · Restricted Project
dmgreen added a comment to D83667: [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz.

How confident are we that the repo.cc file is the cause of the bug? As opposed to another object file? Like I said, this change unfortunately makes quite a few differences and it's a bit hard to tell which one is at fault at the moment! I don't think we saw anything fail locally from this (but I may have just missed it), so I'm trying to figure out how to pin this down.

Thu, Aug 13, 2:55 PM · Restricted Project
dmgreen added a reverting change for rG18279a54b5d3: [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz: rG0c390c22a5af: Revert "[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz".
Thu, Aug 13, 2:41 PM
dmgreen committed rG0c390c22a5af: Revert "[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz" (authored by dmgreen).
Revert "[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz"
Thu, Aug 13, 2:41 PM
dmgreen added a reverting change for D83667: [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz: rG0c390c22a5af: Revert "[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz".
Thu, Aug 13, 2:41 PM · Restricted Project
dmgreen added a comment to D83667: [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz.

Thanks. It's hard to tell in all that where the problem might be, there are quite a few changes in all! And I didn't spot anything obvious by eyeballing it.

Thu, Aug 13, 11:39 AM · Restricted Project
dmgreen committed rG2632c625ed9b: [ARM] Mark VMINNMA/VMAXNMA as commutative (authored by dmgreen).
[ARM] Mark VMINNMA/VMAXNMA as commutative
Thu, Aug 13, 10:01 AM
dmgreen closed D85813: [ARM] Mark VMINNMA/VMAXNMA as commutative.
Thu, Aug 13, 10:01 AM · Restricted Project
dmgreen accepted D85825: [ARM] Enabled VMLAV and Add instructions to use VMLAVA.

This seems good to me.

Thu, Aug 13, 6:16 AM · Restricted Project
dmgreen accepted D85889: [ARM][MVE] Fix for tail predication for loops containing MVE gather/scatters.

OK. Thanks. LGTM

Thu, Aug 13, 4:19 AM · Restricted Project

Wed, Aug 12

dmgreen committed rGf07f17ac7c14: [Scheduler] Fix typo in comments. NFC (authored by dmgreen).
[Scheduler] Fix typo in comments. NFC
Wed, Aug 12, 10:36 AM
dmgreen committed rG1bb348868501: [ARM] Predicated VFMA patterns (authored by dmgreen).
[ARM] Predicated VFMA patterns
Wed, Aug 12, 10:36 AM
dmgreen closed D85824: [ARM] Predicated VFMA patterns.
Wed, Aug 12, 10:36 AM · Restricted Project
dmgreen added a comment to D84741: [LV] Allow tail folded reduction selects to remain in the loop.

Thanks for taking a look. I will update this soon...

Wed, Aug 12, 7:06 AM · Restricted Project
dmgreen committed rGe859868eb380: [ARM] Add additional predicated VFMA tests. NFC (authored by dmgreen).
[ARM] Add additional predicated VFMA tests. NFC
Wed, Aug 12, 6:20 AM
dmgreen committed rGfccf4c6115a8: [ARM] Commutative vmin/maxnma tests. NFC (authored by dmgreen).
[ARM] Commutative vmin/maxnma tests. NFC
Wed, Aug 12, 4:51 AM
dmgreen accepted D85723: [LoopUnroll] Adjust CostKind query.

Sounds like an improvement to me. Better than using TCK_CodeSize and the option is a nice addition.

Wed, Aug 12, 4:49 AM · Restricted Project
dmgreen added inline comments to D85825: [ARM] Enabled VMLAV and Add instructions to use VMLAVA.
Wed, Aug 12, 4:23 AM · Restricted Project
dmgreen requested review of D85824: [ARM] Predicated VFMA patterns.
Wed, Aug 12, 2:49 AM · Restricted Project
dmgreen requested review of D85813: [ARM] Mark VMINNMA/VMAXNMA as commutative.
Wed, Aug 12, 12:17 AM · Restricted Project

Tue, Aug 11

dmgreen accepted D85673: [NFC][LoopUnrollAndJam] Use BasicBlock::replacePhiUsesWith instead of static function updatePHIBlocks..

Nice. Sounds good to me.

Tue, Aug 11, 6:12 AM · Restricted Project
dmgreen added a comment to D82091: [ARM][CostModel] Select instruction costs..

P.S I agree TCK_SizeAndLatency sounds better than Codesize, for the transforms.

Tue, Aug 11, 3:56 AM · Restricted Project
dmgreen added inline comments to D82091: [ARM][CostModel] Select instruction costs..
Tue, Aug 11, 3:54 AM · Restricted Project
dmgreen added a comment to D79785: [ARM] Register pressure with -mthumb forces register reload before each call.

My results seem to agree, that this improves things and doesn't break anything (they were only codesize benchmarks, but they all built OK).

Tue, Aug 11, 1:26 AM · Restricted Project

Mon, Aug 10

dmgreen added inline comments to D85517: [Scheduling] Implement a new way to cluster loads/stores.
Mon, Aug 10, 3:01 AM · Restricted Project

Sun, Aug 9

dmgreen committed rG186a7f81e813: [ARM] Add VADDV and VMLAV patterns for v16i16 (authored by dmgreen).
[ARM] Add VADDV and VMLAV patterns for v16i16
Sun, Aug 9, 3:10 AM
dmgreen closed D85452: [ARM] Add VADDV and VMLAV patterns for v16i16.
Sun, Aug 9, 3:10 AM · Restricted Project
dmgreen committed rG8590e5abad51: [ARM] Allow vecreduce_add in tail predicated loops (authored by dmgreen).
[ARM] Allow vecreduce_add in tail predicated loops
Sun, Aug 9, 3:03 AM
dmgreen committed rG296faa91ed55: [ARM] Some formatting and predicate VRHADD patterns. NFC (authored by dmgreen).
[ARM] Some formatting and predicate VRHADD patterns. NFC
Sun, Aug 9, 2:57 AM
dmgreen closed D85454: [ARM] Allow vecreduce_add in tail predicated loops.
Sun, Aug 9, 2:57 AM · Restricted Project
dmgreen added a comment to D85454: [ARM] Allow vecreduce_add in tail predicated loops.

After the rewrite of this pass to use activelanemask, that's essentially all there's left here

Sun, Aug 9, 2:56 AM · Restricted Project

Sat, Aug 8

dmgreen accepted D85575: [ARM] Speed up arm-cortex-cpus.c test.

Yeah, nice. Sounds good to me.

Sat, Aug 8, 3:43 AM · Restricted Project

Fri, Aug 7

dmgreen committed rG25e38c3f3c2a: [ARM] Extra reduction plus tailpredication tests. NFC (authored by dmgreen).
[ARM] Extra reduction plus tailpredication tests. NFC
Fri, Aug 7, 9:17 AM

Thu, Aug 6

dmgreen requested review of D85454: [ARM] Allow vecreduce_add in tail predicated loops.
Thu, Aug 6, 11:12 AM · Restricted Project
dmgreen requested review of D85452: [ARM] Add VADDV and VMLAV patterns for v16i16.
Thu, Aug 6, 11:06 AM · Restricted Project
dmgreen accepted D85138: [ARM][MVE] Enable tail predication for loops containing MVE gather/scatters.

Sounds good to me then, thanks.

Thu, Aug 6, 6:46 AM · Restricted Project
dmgreen committed rG745bf6cf4471: [LoopVectorizer] Inloop vector reductions (authored by dmgreen).
[LoopVectorizer] Inloop vector reductions
Thu, Aug 6, 2:12 AM
dmgreen added inline comments to D85410: [ARM][MVE] Allow loops containing strides != 1 to be tail predicated with gather/scatters enabled.
Thu, Aug 6, 2:09 AM · Restricted Project

Wed, Aug 5

dmgreen added a comment to D75069: [LoopVectorizer] Inloop vector reductions.

Thanks. Sorry about that, it appears clang doesn't like this code as much as gcc did and then my internet went out whilst I was trying to figure out what was wrong.

Wed, Aug 5, 11:32 AM · Restricted Project
dmgreen committed rGe9761688e41c: [LoopVectorizer] Inloop vector reductions (authored by dmgreen).
[LoopVectorizer] Inloop vector reductions
Wed, Aug 5, 10:14 AM
dmgreen closed D75069: [LoopVectorizer] Inloop vector reductions.
Wed, Aug 5, 10:14 AM · Restricted Project
dmgreen added a comment to D75512: [LoopVectorizer][ARM] Add preferInloopReduction reduction..

Ping

Wed, Aug 5, 10:06 AM · Restricted Project
dmgreen added a comment to D84741: [LV] Allow tail folded reduction selects to remain in the loop.

ping :)

Wed, Aug 5, 10:06 AM · Restricted Project
dmgreen added a comment to D85283: [ARM][CostModel] Implement getCFInstrCost.

Registers are free unless you go over a limit. And I wouldn't expect it to be these individual cost functions that attempted to guess whether it was over that limit.

Wed, Aug 5, 6:11 AM · Restricted Project
dmgreen added a comment to D85283: [ARM][CostModel] Implement getCFInstrCost.

Do you mean it's the cost of a phi that is altering things? They certainly sounds like they should be free most of the time. Even for codesize I would expect them to be folded away a lot of the time. You just have to get the inputs to share a register after all.

Wed, Aug 5, 4:52 AM · Restricted Project
dmgreen accepted D85283: [ARM][CostModel] Implement getCFInstrCost.

I kind of think this should be the default (plus it's perhaps a little strange for -march=thumbv8.1-m to have a difference branch cost to -march=thumbv8.1-m+mve).

Wed, Aug 5, 4:16 AM · Restricted Project

Tue, Aug 4

dmgreen added a comment to D82998: [BasicAA] Enable -basic-aa-recphi by default.

Sounds good. Let me know if you find anything.

Tue, Aug 4, 3:57 AM · Restricted Project
dmgreen committed rG3c7e7d40a996: [BasicAA] Enable -basic-aa-recphi by default (authored by dmgreen).
[BasicAA] Enable -basic-aa-recphi by default
Tue, Aug 4, 2:44 AM
dmgreen added a comment to D82998: [BasicAA] Enable -basic-aa-recphi by default.

OK. Lets give this another go. There is one additional test update where we manage to convert a loop to a memcpy call.

Tue, Aug 4, 2:37 AM · Restricted Project
dmgreen accepted D84930: [AArch64] Consider instruction-level contract FMFs in combiner patterns..

Thanks. LGTM, in that this work the same as DAGCombiner.

Tue, Aug 4, 1:12 AM · Restricted Project
dmgreen added a comment to D85138: [ARM][MVE] Enable tail predication for loops containing MVE gather/scatters.

I was looking at this pass for something else recently. I'm not sure if the legality checks are really necessary in here. We might want to change it to just check for active lane masks and convert them to vctp's (when legal). I think that will always be better in terms of code quality than the expansion of the active lane mask, no matter if we end up transforming to a tail predicated loop or not.

Tue, Aug 4, 1:12 AM · Restricted Project

Mon, Aug 3

dmgreen added inline comments to D85101: [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported.
Mon, Aug 3, 2:04 PM · Restricted Project
dmgreen committed rG22916481c11e: [ARM] Convert VPSEL to VMOV in tail predicated loops (authored by dmgreen).
[ARM] Convert VPSEL to VMOV in tail predicated loops
Mon, Aug 3, 2:03 PM
dmgreen closed D85110: [ARM] Convert VPSEL to VMOV in tail predicated loops.
Mon, Aug 3, 2:03 PM · Restricted Project
dmgreen committed rG21de4e74acf6: [ARM] Test for converting VPSEL to VMOVT. NFC (authored by dmgreen).
[ARM] Test for converting VPSEL to VMOVT. NFC
Mon, Aug 3, 1:46 PM
dmgreen accepted D85120: [ARM] Generated SSAT and USAT instructions with shift.

LGTM. Thanks

Mon, Aug 3, 1:41 PM · Restricted Project
dmgreen added a comment to D79767: [ARM] Macro fuse t2LoopDec and t2LoopEnd.

The last time me and Sjoerd talked about it, we figured this wouldn't fix the issue exactly (it only fuses them during scheduling, you can still spill between the t2LoopDec and the End), and as we need a proper solution anyway this might not end up being useful on it's own.

Mon, Aug 3, 1:40 PM · Restricted Project
dmgreen accepted D85152: [SVE] Remove bad call to VectorType::getNumElements() from ARM.

Sure. LGTM

Mon, Aug 3, 1:28 PM · Restricted Project
dmgreen added inline comments to D85120: [ARM] Generated SSAT and USAT instructions with shift.
Mon, Aug 3, 6:52 AM · Restricted Project
dmgreen accepted D83667: [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz.

Thanks. LGTM with a very minor nitpick

Mon, Aug 3, 2:13 AM · Restricted Project
dmgreen requested review of D85110: [ARM] Convert VPSEL to VMOV in tail predicated loops.
Mon, Aug 3, 12:48 AM · Restricted Project
dmgreen added a comment to D85101: [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported.

Quick question - what is the expected behaviour? Do we just never expect to see an bf16 add, and if we do it's a fatal error? Or is some form of automatic promotion expected to happen?

Mon, Aug 3, 12:35 AM · Restricted Project

Sun, Aug 2

dmgreen accepted D85087: [LV] Do not check widening decision for instrs outside of loop..

Oh right. Sorry I saw that bug but didn't put two and two together somehow.

Sun, Aug 2, 4:02 AM · Restricted Project

Sat, Aug 1

dmgreen committed rGfd69df62ed10: [ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores (authored by dmgreen).
[ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores
Sat, Aug 1, 6:01 AM
dmgreen closed D78625: [ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores.
Sat, Aug 1, 6:01 AM · Restricted Project
dmgreen added a comment to D82998: [BasicAA] Enable -basic-aa-recphi by default.

Thanks to Adenilson and Hans I believe chromium has now fixed the issue their end. I have also ran another bootstrap and the llvm-test-suite, which are both still doing OK.

Sat, Aug 1, 1:11 AM · Restricted Project

Fri, Jul 31

dmgreen added a comment to D78625: [ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores.

I think we are still at the behests of LSR's cost modeling I'm afraid. This can just do slightly better at fixing up the results afterwards, it can slightly improve things in case ISel comes up with something unoptimal.

Fri, Jul 31, 2:45 AM · Restricted Project
dmgreen updated the diff for D78625: [ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores.

Now includes a quick codesize metric, to try and detect cases where a t2LDRi12 can be shrunk to tLDRi.

Fri, Jul 31, 2:42 AM · Restricted Project

Thu, Jul 30

dmgreen added inline comments to D84930: [AArch64] Consider instruction-level contract FMFs in combiner patterns..
Thu, Jul 30, 7:22 AM · Restricted Project
dmgreen added inline comments to D84923: [ARM] Fix so immediates and pc relative checks.
Thu, Jul 30, 6:49 AM · Restricted Project
dmgreen added inline comments to D84923: [ARM] Fix so immediates and pc relative checks.
Thu, Jul 30, 6:47 AM · Restricted Project
dmgreen committed rG1da0c47fa2e6: [LoopVectorizer] Don't create unused block masks for reductions. NFC (authored by dmgreen).
[LoopVectorizer] Don't create unused block masks for reductions. NFC
Thu, Jul 30, 6:28 AM
dmgreen closed D81415: [LoopVectorizer] Don't create unused block masks for reductions. NFC.
Thu, Jul 30, 6:28 AM · Restricted Project
dmgreen accepted D84884: [SelectionDAG] Fix lowering of vector geps.

LGTM

Thu, Jul 30, 12:17 AM · Restricted Project

Wed, Jul 29

dmgreen committed rG9ddb28964c92: [ARM] Tune getCastInstrCost for extending masked loads and truncating masked… (authored by dmgreen).
[ARM] Tune getCastInstrCost for extending masked loads and truncating masked…
Wed, Jul 29, 5:42 AM
dmgreen closed D79163: [Target][ARM] Tune getCastInstrCost for extending masked loads and truncating masked stores.
Wed, Jul 29, 5:41 AM · Restricted Project
dmgreen committed rG60280e9818a6: [Analysis] TTI: Add CastContextHint for getCastInstrCost (authored by dmgreen).
[Analysis] TTI: Add CastContextHint for getCastInstrCost
Wed, Jul 29, 5:33 AM
dmgreen closed D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.
Wed, Jul 29, 5:33 AM · Restricted Project
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

Thanks.

Wed, Jul 29, 4:17 AM · Restricted Project

Tue, Jul 28

dmgreen accepted D84332: [DAGCombiner] Fold sext_inreg of a masked load into a signed extended masked load.

Thanks. LGTM, but please give others a day in case they have comments.

Tue, Jul 28, 3:51 AM · Restricted Project
dmgreen accepted D84653: ARM: make Thumb1 instructions non-flag-setting in IT block..

Thanks. LGTM

Tue, Jul 28, 3:46 AM · Restricted Project
dmgreen requested review of D84741: [LV] Allow tail folded reduction selects to remain in the loop.
Tue, Jul 28, 3:35 AM · Restricted Project

Mon, Jul 27

dmgreen accepted D84027: [ARM][MVE] Teach MVEGatherScatterLowering to merge successive getelementpointers.

Thanks. LGTM

Mon, Jul 27, 11:20 PM · Restricted Project
dmgreen added inline comments to D84332: [DAGCombiner] Fold sext_inreg of a masked load into a signed extended masked load.
Mon, Jul 27, 9:37 AM · Restricted Project
dmgreen updated subscribers of D84653: ARM: make Thumb1 instructions non-flag-setting in IT block..

This looks familiar, as something @NickGuy was looking at recently from D83667. We didn't know about ThumbArithFlagSetting though, that's a nice way to do it.

Mon, Jul 27, 7:21 AM · Restricted Project
dmgreen added inline comments to D84332: [DAGCombiner] Fold sext_inreg of a masked load into a signed extended masked load.
Mon, Jul 27, 4:42 AM · Restricted Project

Thu, Jul 23

dmgreen committed rGb37e92201c2a: [ARM] Add predicated mla reduction patterns (authored by dmgreen).
[ARM] Add predicated mla reduction patterns
Thu, Jul 23, 1:49 PM
dmgreen closed D84102: [ARM] Add predicated mla reduction patterns.
Thu, Jul 23, 1:49 PM · Restricted Project
dmgreen added inline comments to D84451: [LV] Tail folded inloop reductions..
Thu, Jul 23, 11:12 AM · Restricted Project
Herald added a project to D84451: [LV] Tail folded inloop reductions.: Restricted Project.
Thu, Jul 23, 11:10 AM · Restricted Project
dmgreen added inline comments to D84332: [DAGCombiner] Fold sext_inreg of a masked load into a signed extended masked load.
Thu, Jul 23, 8:34 AM · Restricted Project
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

Ping :)

Thu, Jul 23, 4:34 AM · Restricted Project

Wed, Jul 22

dmgreen added a comment to D83219: [ARM] Add MVE_TwoOpPattern. NFC.

OK. Hopefully fixed in 411eb87c7962ec817ab6bf7aa3c737a3159d2d4e. Thanks for the report/reproducer, and sorry I didn't catch it earlier.

Wed, Jul 22, 12:46 PM · Restricted Project
dmgreen committed rG411eb87c7962: [ARM] Fix missing MVE_VMUL_qr predicate (authored by dmgreen).
[ARM] Fix missing MVE_VMUL_qr predicate
Wed, Jul 22, 12:43 PM
dmgreen added a comment to D83219: [ARM] Add MVE_TwoOpPattern. NFC.

Yeah OK. This should be simple enough. It's missing the predicate off VMUL_qr. I'll just run a quick check-all and submit the fix.

Wed, Jul 22, 12:22 PM · Restricted Project
dmgreen added a comment to D83219: [ARM] Add MVE_TwoOpPattern. NFC.

Oh. I must have missed a requires clause I suspect. I'll take a look now, and revert if I can't find the problem.

Wed, Jul 22, 12:13 PM · Restricted Project