Instructions that have more uops than the processor's IssueWidth are
issued in multiple cycles.
The patch fixes PR49712.
Paths
| Differential D99339
[MCA] Support carry-over instructions for in-order processors ClosedPublic Authored by asavonic on Mar 25 2021, 7:19 AM.
Details Summary Instructions that have more uops than the processor's IssueWidth are The patch fixes PR49712.
Diff Detail
Event TimelineHerald added subscribers: kerbowa, gbedwell, hiraditya and 2 others. · View Herald TranscriptMar 25 2021, 7:19 AM Comment Actions LGTM modulo a few nits (see comments below).
This revision is now accepted and ready to land.Mar 25 2021, 8:02 AM Comment Actions
Comment Actions Thanks for the review Andrea!
This revision was landed with ongoing or failed builds.Mar 25 2021, 2:17 PM Closed by commit rGbba25a9cd827: [MCA] Support carry-over instructions for in-order processors (authored by asavonic). · Explain Why This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 333397 llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
llvm/lib/MCA/Stages/InOrderIssueStage.cpp
llvm/test/tools/llvm-mca/AArch64/Cortex/A53-carry-over.s
llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
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This check is not needed if ShouldCarryOver is true. It can be safely moved inside the the above else block (at like 261).