[mlir] simplify type constraints in AVX512 dialect

[ftynse]

Summary

VectorOfLengthAndType accepts a cartesian product of given lengths and types
rather than types produced by co-indexed values in the corresponding lists.
Update the definitions accordingly. The type validity is already enforced by
op traits.

mlir/include/mlir/Dialect/AVX512/AVX512.td

def MaskCompressOp : AVX512_Op<"mask.compress", [NoSideEffect,
 
   #### From the Intel Intrinsics Guide:
 
   Contiguously store the active integer/floating-point elements in `a` (those
   with their respective bit set in writemask `k`) to `dst`, and pass through the
   remaining elements from `src`.
   }];
   let verifier = [{ return ::verify(*this); }];
-  let arguments = (ins VectorOfLengthAndType<[16, 16, 8, 8],
-                                             [I1, I1, I1, I1]>:$k,
-                   VectorOfLengthAndType<[16, 16, 8, 8],
+  let arguments = (ins VectorOfLengthAndType<[16, 8],
+                                             [I1]>:$k,
+                   VectorOfLengthAndType<[16, 8],
                                          [F32, I32, F64, I64]>:$a,
-                   Optional<VectorOfLengthAndType<[16, 16, 8, 8],
+                   Optional<VectorOfLengthAndType<[16, 8],
                                                   [F32, I32, F64, I64]>>:$src,
                    OptionalAttr<ElementsAttr>:$constant_src);
-  let results = (outs VectorOfLengthAndType<[16, 16, 8, 8],
+  let results = (outs VectorOfLengthAndType<[16, 8],
                                             [F32, I32, F64, I64]>:$dst);
   let assemblyFormat = "$k `,` $a (`,` $src^)? attr-dict"
                        " `:` type($dst) (`,` type($src)^)?";
 }
 
 def MaskRndScaleOp : AVX512_Op<"mask.rndscale", [NoSideEffect,
   AllTypesMatch<["src", "a", "dst"]>,
   TypesMatchWith<"imm has the same number of bits as elements in dst",
let description = [{
     indication of match in the corresponding bit of two mask registers
     specified by `k1` and `k2`. A match in corresponding elements of `a` and
     `b` is indicated by a set bit in the corresponding bit of the mask
     registers.
   }];
   let arguments = (ins VectorOfLengthAndType<[16, 8], [I32, I64]>:$a,
                    VectorOfLengthAndType<[16, 8], [I32, I64]>:$b
                    );
-  let results = (outs VectorOfLengthAndType<[16, 8], [I1, I1]>:$k1,
-                 VectorOfLengthAndType<[16, 8], [I1, I1]>:$k2
+  let results = (outs VectorOfLengthAndType<[16, 8], [I1]>:$k1,
+                 VectorOfLengthAndType<[16, 8], [I1]>:$k2
                  );
   let assemblyFormat =
     "$a `,` $b attr-dict `:` type($a)";
 }
 
 #endif // AVX512_OPS