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[AIX][TLS] Generate 32-bit general-dynamic access code sequence
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Authored by lei on Mar 4 2021, 7:09 AM.

Details

Summary

Adds support for the TLS general dynamic access model to
assembly files on AIX 32-bit.

To generate the correct code sequence when accessing a TLS variable
v, we first create two TOC entry nodes, one for the variable offset, one
for the region handle. These nodes are followed by a PPCISD::TLSGD_AIX
node (new node introduced by this patch).
The PPCISD::TLSGD_AIX node (TLSGDAIX pseudo instruction) is
expanded to 2 copies (to put the variable offset and region handle in
the right registers) and a call to __tls_get_addr.

This patch also changes the way TC entries are generated in asm files.
If the generated TC entry is for the region handle of a TLS variable,
we add the @m relocation and the . prefix to the entry name.
For example:

L..C0:
  .tc .v[TC],v[TL]@m -> region handle
L..C1:
  .tc v[TC],v[TL] -> variable offset

Diff Detail

Event Timeline

lei created this revision.Mar 4 2021, 7:09 AM
lei requested review of this revision.Mar 4 2021, 7:09 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 4 2021, 7:09 AM
daltenty added inline comments.Mar 4 2021, 7:43 AM
llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
362

Do we need all these attributes for the test? Likewise, we need to cleanup the flags and identifiers below.

llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
362

ditto previous comment

llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
458

ditto previous comment

lei updated this revision to Diff 328209.Mar 4 2021, 9:16 AM

Clean up test cases.

lei marked 3 inline comments as done.Mar 4 2021, 9:29 AM
lei updated this revision to Diff 328295.Mar 4 2021, 1:27 PM

Remove non tls related tests.
Split up linkage coverage between the 3 test files.
Improve on documentation of code.

daltenty added inline comments.Mar 4 2021, 3:21 PM
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
3141

nit: typo

3142

nit: typo

llvm/lib/Target/PowerPC/PPCISelLowering.h
360

nit: typo

lei updated this revision to Diff 328352.Mar 4 2021, 6:18 PM

fix typo

lei marked 3 inline comments as done.Mar 4 2021, 6:19 PM
nemanjai accepted this revision.Mar 4 2021, 7:40 PM

LGTM other than the minor nits.

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
815

Minor nit: since this comment is already in the lambda, we don't really need it at the call sites (here and below).

2333
// The reference to .__tls_get_addr is unknown to the assembler
// so we need to emit an external symbol reference.
llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
2

Nit: can you please produce the test cases with -O2 or at least run mem2reg on them. The stores of the arguments on the stack detract from the readability of the tests.

This revision is now accepted and ready to land.Mar 4 2021, 7:40 PM

Patch looks good Lei, the one thing we are missing though is a lit test that checks for the expected toc entries.

lei updated this revision to Diff 328518.Mar 5 2021, 7:10 AM
lei marked 2 inline comments as done.

Remove unnecessary code documentation.
Update test to use IR generated via -O2

lei updated this revision to Diff 328590.Mar 5 2021, 10:57 AM

Add checks for TOC entries

lei updated this revision to Diff 328594.Mar 5 2021, 11:00 AM

Remove autogen check msg from testcase.

sfertile accepted this revision.Mar 5 2021, 11:02 AM

Thanks for the updates Lei. LGTM.

This revision was landed with ongoing or failed builds.Mar 8 2021, 7:31 AM
This revision was automatically updated to reflect the committed changes.