[PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases

[Conanap]

Summary

Some cases may be transformed into 32 bit splats before hitting the boolean statement, which may cause incorrect behaviour and provide XXSPLTI32DX with the incorrect values of splat. The condition was reversed so that the shortcut prevents this problem.

[nemanjai]

LGTM as long as the nits are addressed on the commit.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

8611

// Check the type first to short-circuit so we don't modify APSplatBits if
// this block isn't executed.

8617

We can get rid of this now that the problem is fixed (i.e. this can go back to just being an else).

llvm/test/CodeGen/PowerPC/p10-splatImm32.ll

104

Get rid of this test case now. It is redundant.

114

Get rid of this comment now, the FIXME has been addressed.

[lei]

LGTM

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
   unsigned SplatBitSize;
   bool HasAnyUndefs;
   bool BVNIsConstantSplat =
       BVN->isConstantSplat(APSplatBits, APSplatUndef, SplatBitSize,
                            HasAnyUndefs, 0, !Subtarget.isLittleEndian());
 
   // If it is a splat of a double, check if we can shrink it to a 32 bit
   // non-denormal float which when converted back to double gives us the same
-  // double. This is to exploit the XXSPLTIDP instruction.+  // If we lose precision, we use XXSPLTI32DX.
+  // double. This is to exploit the XXSPLTIDP instruction.
+  // If we lose precision, we use XXSPLTI32DX.
   if (BVNIsConstantSplat && (SplatBitSize == 64) &&
       Subtarget.hasPrefixInstrs()) {
-    if (convertToNonDenormSingle(APSplatBits) &&
-        (Op->getValueType(0) == MVT::v2f64)) {
+    if ((Op->getValueType(0) == MVT::v2f64) &&
+        convertToNonDenormSingle(APSplatBits)) {
       SDValue SplatNode = DAG.getNode(
           PPCISD::XXSPLTI_SP_TO_DP, dl, MVT::v2f64,
           DAG.getTargetConstant(APSplatBits.getZExtValue(), dl, MVT::i32));
       return DAG.getBitcast(Op.getValueType(), SplatNode);
     } else if (APSplatBits.getBitWidth() == 64) {
       // We may lose precision, so we have to use XXSPLTI32DX.
 
       uint32_t Hi =
           (uint32_t)((APSplatBits.getZExtValue() & 0xFFFFFFFF00000000LL) >> 32);
       uint32_t Lo =
           (uint32_t)(APSplatBits.getZExtValue() & 0xFFFFFFFF);
       SDValue SplatNode = DAG.getUNDEF(MVT::v2i64);
 

llvm/test/CodeGen/PowerPC/p10-splatImm32.ll

 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xxsplti32dx vs34, 0, 23855277
 ; CHECK-NEXT:    xxsplti32dx vs34, 1, 65827
 ; CHECK-NEXT:    blr
 entry:
   ret <8 x i16> <i16 291, i16 undef, i16 undef, i16 364, i16 undef, i16 1, i16 173, i16 undef>
 }
 
 define dso_local <16 x i8> @test_xxsplti32dx_10() {
 ; CHECK-LABEL: test_xxsplti32dx_10:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xxlxor vs34, vs34, vs34
 ; CHECK-NEXT:    xxsplti32dx vs34, 0, 1207959552
 ; CHECK-NEXT:    blr
 entry:
   ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 72, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 72>
 }
 
 ; FIXME: It appears that there is something wrong with the computation
 ;        of the 64-bit constant to splat so we cannot emit xxsplti32dx for
 ;        this test case for now.
 define dso_local <16 x i8> @constSplatBug() {
 ; CHECK-LABEL: constSplatBug:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    plxv vs34, .LCPI10_0@PCREL(0), 1
+; CHECK-NEXT:    xxlxor vs34, vs34, vs34
+; CHECK-NEXT:    xxsplti32dx vs34, 0, 1191182336
 ; CHECK-NEXT:    blr
 entry:
   ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 71>
 }