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AMDGPU: Add assertion to determineCalleeSaves
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Authored by arsenm on Jan 21 2021, 10:24 AM.

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Reviewers

rampitec
scott.linder
kerbowa
RamNalamothu

Summary

Make sure this isn't getting called multiple times. I was surprised we
were modifying the function here, which I think is a bit questionable.

Diff Detail

Event Timeline

arsenm created this revision.Jan 21 2021, 10:24 AM

Herald added subscribers: hiraditya, t-tye, tpr and 5 others. · View Herald TranscriptJan 21 2021, 10:24 AM

arsenm requested review of this revision.Jan 21 2021, 10:24 AM

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rampitec accepted this revision.Jan 21 2021, 12:16 PM

This revision is now accepted and ready to land.Jan 21 2021, 12:16 PM

92d1195b5f76548ca35bc00d97e0a28053b2c4a4

Revision Contents

Path

Size

llvm/

lib/

Target/

AMDGPU/

SIFrameLowering.cpp

5 lines

Diff 318252

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

Show First 20 Lines • Show All 1,297 Lines • ▼ Show 20 Lines	void SIFrameLowering::determineCalleeSaves(MachineFunction &MF,
// so don't allow the default insertion to handle them.		// so don't allow the default insertion to handle them.
for (auto SSpill : MFI->getSGPRSpillVGPRs())		for (auto SSpill : MFI->getSGPRSpillVGPRs())
SavedVGPRs.reset(SSpill.VGPR);		SavedVGPRs.reset(SSpill.VGPR);

LivePhysRegs LiveRegs;		LivePhysRegs LiveRegs;
LiveRegs.init(*TRI);		LiveRegs.init(*TRI);

if (WillHaveFP \|\| hasFP(MF)) {		if (WillHaveFP \|\| hasFP(MF)) {
		assert(!MFI->SGPRForFPSaveRestoreCopy && !MFI->FramePointerSaveIndex &&
		"Re-reserving spill slot for FP");
getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForFPSaveRestoreCopy,		getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForFPSaveRestoreCopy,
MFI->FramePointerSaveIndex, true);		MFI->FramePointerSaveIndex, true);
}		}

if (TRI->hasBasePointer(MF)) {		if (TRI->hasBasePointer(MF)) {
if (MFI->SGPRForFPSaveRestoreCopy)		if (MFI->SGPRForFPSaveRestoreCopy)
LiveRegs.addReg(MFI->SGPRForFPSaveRestoreCopy);		LiveRegs.addReg(MFI->SGPRForFPSaveRestoreCopy);

		assert(!MFI->SGPRForBPSaveRestoreCopy &&
		!MFI->BasePointerSaveIndex && "Re-reserving spill slot for BP");
getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForBPSaveRestoreCopy,		getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForBPSaveRestoreCopy,
MFI->BasePointerSaveIndex, false);		MFI->BasePointerSaveIndex, false);
}		}
}		}

void SIFrameLowering::determineCalleeSavesSGPR(MachineFunction &MF,		void SIFrameLowering::determineCalleeSavesSGPR(MachineFunction &MF,
BitVector &SavedRegs,		BitVector &SavedRegs,
RegScavenger *RS) const {		RegScavenger *RS) const {
▲ Show 20 Lines • Show All 140 Lines • Show Last 20 Lines