[NFC] Disallow unused prefixes under MC/ARM

[grimar]

I am not the right person to review this, I don't work on MC or MC/ARM. I think you should add people who mantains MC/ARM and/or may be authors of these tests.
The change looks good to me though.

[dmgreen]

Yeah, LGTM

llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s

-@RUN: llvm-mc -triple armv7-base-apple-darwin %s | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK %s
-@RUN: llvm-mc -triple thumbv7-base-apple-darwin %s | FileCheck --check-prefix=CHECK-THUMB2 --check-prefix=CHECK %s
+@RUN: llvm-mc -triple armv7-base-apple-darwin %s | FileCheck --check-prefix=CHECK %s
+@RUN: llvm-mc -triple thumbv7-base-apple-darwin %s | FileCheck --check-prefix=CHECK %s
 
 @
 @ Check that ldr to constant pool correctly transfers the condition codes
 @
 @ simple test
 .section __TEXT,a,regular,pure_instructions
 @ CHECK-LABEL: f0:
 f0:

llvm/test/MC/ARM/ldr-pseudo-cond.s

-@RUN: llvm-mc -triple armv7-unknown-linux-gnueabi %s | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK %s
-@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck --check-prefix=CHECK-THUMB2 --check-prefix=CHECK %s
+@RUN: llvm-mc -triple armv7-unknown-linux-gnueabi %s | FileCheck --check-prefix=CHECK %s
+@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck --check-prefix=CHECK %s
 
 @
 @ Check that ldr to constant pool correctly transfers the condition codes
 @
 @ simple test
 .section a,"ax",%progbits
 @ CHECK-LABEL: f0:
 f0:

llvm/test/MC/ARM/lit.local.cfg

+from lit.llvm.subst import ToolSubst
+
 if not 'ARM' in config.root.targets:
     config.unsupported = True
+
+fc = ToolSubst('FileCheck', unresolved='fatal')
+# Insert this first. Then, we'll first update the blank FileCheck command; then,
+# the default substitution of FileCheck will replace it to its full path.
+config.substitutions.insert(0, (fc.regex,
+    'FileCheck --allow-unused-prefixes=false'))

llvm/test/MC/ARM/lsl-zero-errors.s

-// RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV7 %s
-// RUN: not llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV8 %s
-// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ARM %s
+// RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck --check-prefixes=CHECK-NONARM,CHECK-THUMBV7 %s
+// RUN: not llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck --check-prefixes=CHECK-NONARM,CHECK-THUMBV8 %s
+// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK-ARM %s
 
         // lsl #0 is actually mov, so here we check that it behaves the same as
         // mov with regards to the permitted registers
 
         // Using PC is invalid in thumb
         lsl pc, r0, #0
         lsl r0, pc, #0
         lsl pc, pc, #0

llvm/test/MC/ARM/lsl-zero.s

-// RUN: llvm-mc -triple=thumbv7 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV7 %s
-// RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV8 %s
-// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ARM %s
+// RUN: llvm-mc -triple=thumbv7 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK-NONARM %s
+// RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK-NONARM %s
+// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK-ARM %s
 
         // lsl #0 is actually mov, so here we check that it behaves the same as
         // mov with regards to the permitted registers and how it behaves in an
         // IT block.
 
         // Non-flags-setting with only one of source and destination SP should
         // be OK
         lsl sp, r0, #0

llvm/test/MC/ARM/mve-fp-registers.s

 // Some simple operations on S, D and Q registers (loads, stores and moves) are
 // also avaliable in MVE, even in the integer-only version. Some of these
 // instructions (operating on D or Q registers, or FP16 values) are only
 // available for certain targets.
 
 // Note that it's not always obvious which instructions are available, for
 // example several instructions operating on D registers are available for
 // single-precision only FPUs.
 
 // All of these instructions are rejected if no VFP or MVE features are
 // present.
 // RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding 2>%t < %s
-// RUN: FileCheck %s < %t --check-prefix=NOFP16 --check-prefix=NOFP32 --check-prefix=NOFP64
+// RUN: FileCheck %s < %t --check-prefixes=NOFP16,NOFP32,NOFP64
 
 // VFP and NEON implementations by default have FP32 and FP64, but not FP16.
 // The VFPv3 FP16 extension just added conversion instructions, which we don't
 // care about here.
-// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+vfp2 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP32 --check-prefix=FP64
+// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+vfp2 2>%t < %s | FileCheck %s --check-prefixes=FP32,FP64
 // RUN: FileCheck %s < %t --check-prefix=NOFP16
-// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+fp-armv8,+neon 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP32 --check-prefix=FP64
+// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+fp-armv8,+neon 2>%t < %s | FileCheck %s --check-prefixes=FP32,FP64
 // RUN: FileCheck %s < %t --check-prefix=NOFP16
 
 // The v8.2A FP16 extension added loads, stores and moves for FP16.
-// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+fp-armv8,+fullfp16 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 --check-prefix=FP32 --check-prefix=FP64
+// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+fp-armv8,+fullfp16 < %s | FileCheck %s --check-prefixes=FP16,FP32,FP64
 
 // M-profile FPUs (e.g. Cortex-M4/M7/M33) do not have FP16 instructions, and
 // the FP64 instructions are optional. They are also limited to 16 D registers,
 // but we don't test that here.
-// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+vfp4d16sp 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP32
-// RUN: FileCheck %s < %t --check-prefix=NOFP16 --check-prefix=NOFP64
-// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+vfp4,-d32 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP32 --check-prefix=FP64
+// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+vfp4d16sp 2>%t < %s | FileCheck %s --check-prefix=FP32
+// RUN: FileCheck %s < %t --check-prefixes=NOFP16,NOFP64
+// RUN: not llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+vfp4,-d32 2>%t < %s | FileCheck %s --check-prefixes=FP32,FP64
 // RUN: FileCheck %s < %t --check-prefix=NOFP16
 
 // Integer-only MVE, which can be combined with different options for scalar
 // FPU (or lack thereof), and has all of the move and store instructions
 // regardless of the scalar FPU.
-// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 --check-prefix=FP32 --check-prefix=FP64
-// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve,+fp-armv8-sp,+fullfp16 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 --check-prefix=FP32 --check-prefix=FP64
-// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve,+fp-armv8,+fullfp16 2>%t < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 --check-prefix=FP32 --check-prefix=FP64
+// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve 2>%t < %s | FileCheck %s --check-prefixes=FP16,FP32,FP64
+// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve,+fp-armv8-sp,+fullfp16 2>%t < %s | FileCheck %s --check-prefixes=FP16,FP32,FP64
+// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve,+fp-armv8,+fullfp16 2>%t < %s | FileCheck %s --check-prefixes=FP16,FP32,FP64
 
 // Maximal v8.1M target: MVE with FP, and scalar FP with double-precision.
-// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve.fp < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 --check-prefix=FP32 --check-prefix=FP64
+// RUN: llvm-mc -triple=thumbv8.1m.main -show-encoding -mattr=+mve.fp < %s | FileCheck %s --check-prefixes=FP16,FP32,FP64
 
 vldmia  r0, {d0}
 # FP32: vldmia  r0, {d0}               @ encoding: [0x90,0xec,0x02,0x0b]
 # NOFP32: :[[@LINE-2]]:{{[0-9]+}}: {{note|error}}: instruction requires: fp registers
 
 vpop    {d0-d15}
 # FP32: vpop {{.*}}                     @ encoding: [0xbd,0xec,0x20,0x0b]
 # NOFP32: :[[@LINE-2]]:{{[0-9]+}}: {{note|error}}: instruction requires: fp registers

llvm/test/MC/ARM/thumbv8m.s

 // RUN: not llvm-mc -triple=thumbv8m.base -show-encoding < %s 2>%t \
-// RUN:   | FileCheck --check-prefix=CHECK-BASELINE --check-prefix=CHECK %s
-// RUN:     FileCheck --check-prefix=UNDEF-BASELINE --check-prefix=UNDEF < %t %s
+// RUN:   | FileCheck --check-prefix=CHECK %s
+// RUN:     FileCheck --check-prefixes=UNDEF-BASELINE,UNDEF < %t %s
 // RUN: not llvm-mc -triple=thumbv8m.main -show-encoding < %s 2>%t \
-// RUN:   | FileCheck --check-prefix=CHECK-MAINLINE --check-prefix=CHECK %s
-// RUN:     FileCheck --check-prefix=UNDEF-MAINLINE --check-prefix=UNDEF < %t %s
+// RUN:   | FileCheck --check-prefixes=CHECK-MAINLINE,CHECK %s
+// RUN:     FileCheck --check-prefixes=UNDEF-MAINLINE,UNDEF < %t %s
 // RUN: not llvm-mc -triple=thumbv8m.main -mattr=+dsp -show-encoding < %s 2>%t \
-// RUN:   | FileCheck --check-prefix=CHECK-MAINLINE_DSP --check-prefix=CHECK %s
-// RUN:     FileCheck --check-prefix=UNDEF-MAINLINE_DSP --check-prefix=UNDEF < %t %s
+// RUN:   | FileCheck --check-prefixes=CHECK-MAINLINE_DSP,CHECK %s
+// RUN:     FileCheck --check-prefixes=UNDEF-MAINLINE_DSP,UNDEF < %t %s
 
 // Simple check that baseline is v6M and mainline is v7M
 // UNDEF-BASELINE: error: instruction requires: thumb2
 // UNDEF-MAINLINE-NOT: error: instruction requires:
 // UNDEF-MAINLINE_DSP-NOT: error: instruction requires:
 mov.w r0, r0
 
 // Check that .arm is invalid