[mlir] Add std.powf to ROCDL lowering.

[frgossen]

Thanks!

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

 
 void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
   target.addIllegalOp<FuncOp>();
   target.addLegalDialect<::mlir::LLVM::LLVMDialect>();
   target.addLegalDialect<ROCDL::ROCDLDialect>();
   target.addIllegalDialect<gpu::GPUDialect>();
   target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
                       LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op, LLVM::Log2Op,
-                      LLVM::SinOp, LLVM::SqrtOp>();
+                      LLVM::PowOp, LLVM::SinOp, LLVM::SqrtOp>();
 
   // TODO: Remove once we support replacing non-root ops.
   target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
 }
 
 void mlir::populateGpuToROCDLConversionPatterns(
     LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
   populateWithGenerated(converter.getDialect()->getContext(), patterns);
void mlir::populateGpuToROCDLConversionPatterns(
   patterns.insert<OpToFuncCallLowering<FloorFOp>>(converter, "__ocml_floor_f32",
                                                   "__ocml_floor_f64");
   patterns.insert<OpToFuncCallLowering<LogOp>>(converter, "__ocml_log_f32",
                                                "__ocml_log_f64");
   patterns.insert<OpToFuncCallLowering<Log10Op>>(converter, "__ocml_log10_f32",
                                                  "__ocml_log10_f64");
   patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",
                                                 "__ocml_log2_f64");
+  patterns.insert<OpToFuncCallLowering<PowFOp>>(converter, "__ocml_pow_f32",
+                                                "__ocml_pow_f64");
   patterns.insert<OpToFuncCallLowering<RsqrtOp>>(converter, "__ocml_rsqrt_f32",
                                                  "__ocml_rsqrt_f64");
   patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32",
                                                "__ocml_sin_f64");
   patterns.insert<OpToFuncCallLowering<SqrtOp>>(converter, "__ocml_sqrt_f32",
                                                 "__ocml_sqrt_f64");
   patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32",
                                                 "__ocml_tanh_f64");
 }
 
 std::unique_ptr<OperationPass<gpu::GPUModuleOp>>
 mlir::createLowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth) {
   return std::make_unique<LowerGpuOpsToROCDLOpsPass>(indexBitwidth);
 }

mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir

gpu.module @test_module {
   func @gpu_atan2(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
     %result32 = std.atan2 %arg_f32, %arg_f32 : f32
     // CHECK: llvm.call @__ocml_atan2_f32(%{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float
     %result64 = std.atan2 %arg_f64, %arg_f64 : f64
     // CHECK: llvm.call @__ocml_atan2_f64(%{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double
     std.return %result32, %result64 : f32, f64
   }
 }
+
+// -----
+
+gpu.module @test_module {
+  // CHECK: llvm.func @__ocml_pow_f32(!llvm.float, !llvm.float) -> !llvm.float
+  // CHECK: llvm.func @__ocml_pow_f64(!llvm.double, !llvm.double) -> !llvm.double
+  // CHECK-LABEL: func @gpu_pow
+  func @gpu_pow(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
+    %result32 = std.powf %arg_f32, %arg_f32 : f32
+    // CHECK: llvm.call @__ocml_pow_f32(%{{.*}}, %{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float
+    %result64 = std.powf %arg_f64, %arg_f64 : f64
+    // CHECK: llvm.call @__ocml_pow_f64(%{{.*}}, %{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double
+    std.return %result32, %result64 : f32, f64
+  }
+}