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Differential D93202

[AMDGPU] Make use of HasSMemRealTime predicate. NFC.
ClosedPublic

Authored by foad on Dec 14 2020, 3:42 AM.

Details

Reviewers
rampitec
Commits
rG07e92e6b6002: [AMDGPU] Make use of HasSMemRealTime predicate. NFC.
Summary

We have this subtarget feature so it makes sense to use it here. This is
NFC because it's always defined by default on GFX8+.

Diff Detail

Unit TestsFailed

TimeTest
80 msx64 windows > LLVM.CodeGen/XCore::threads.ll

Event Timeline

foad created this revision.Dec 14 2020, 3:42 AM
Herald added subscribers: kerbowa, hiraditya, t-tye and 7 others. · View Herald TranscriptDec 14 2020, 3:42 AM
foad requested review of this revision.Dec 14 2020, 3:42 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 14 2020, 3:42 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
Harbormaster completed remote builds in B82246: Diff 311541.Dec 14 2020, 4:24 AM
rampitec accepted this revision.Dec 14 2020, 8:31 AM

LGTM

This revision is now accepted and ready to land.Dec 14 2020, 8:31 AM
This revision was landed with ongoing or failed builds.Dec 14 2020, 8:43 AM
Closed by commit rG07e92e6b6002: [AMDGPU] Make use of HasSMemRealTime predicate. NFC. (authored by foad). · Explain Why
This revision was automatically updated to reflect the committed changes.
foad added a commit: rG07e92e6b6002: [AMDGPU] Make use of HasSMemRealTime predicate. NFC..

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
3 lines
4 lines

Diff 311541

llvm/lib/Target/AMDGPU/AMDGPU.td

Show First 20 Lines • Show All 1,258 Lines • ▼ Show 20 Linesdef HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
AssemblerPredicate<(all_of FeatureDot6Insts)>; AssemblerPredicate<(all_of FeatureDot6Insts)>;
def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">, def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">,
AssemblerPredicate<(all_of FeatureGetWaveIdInst)>; AssemblerPredicate<(all_of FeatureGetWaveIdInst)>;
def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">, def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">,
AssemblerPredicate<(all_of FeatureMAIInsts)>; AssemblerPredicate<(all_of FeatureMAIInsts)>;
def HasSMemRealTime : Predicate<"Subtarget->hasSMemRealTime()">,
AssemblerPredicate<(all_of FeatureSMemRealTime)>;
def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">, def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">,
AssemblerPredicate<(all_of FeatureSMemTimeInst)>; AssemblerPredicate<(all_of FeatureSMemTimeInst)>;
def HasNoSMemTimeInst : Predicate<"!Subtarget->hasSMemTimeInst()">; def HasNoSMemTimeInst : Predicate<"!Subtarget->hasSMemTimeInst()">;
def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">, def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">,
AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>; AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>;
Show All 35 Lines

llvm/lib/Target/AMDGPU/SMInstructions.td

Show First 20 Lines • Show All 326 Lines • ▼ Show 20 Lines
def S_DCACHE_INV_VOL : SM_Inval_Pseudo <"s_dcache_inv_vol", int_amdgcn_s_dcache_inv_vol>; def S_DCACHE_INV_VOL : SM_Inval_Pseudo <"s_dcache_inv_vol", int_amdgcn_s_dcache_inv_vol>;
} // let SubtargetPredicate = isGFX7GFX8GFX9 } // let SubtargetPredicate = isGFX7GFX8GFX9
let SubtargetPredicate = isGFX8Plus in { let SubtargetPredicate = isGFX8Plus in {
let OtherPredicates = [HasScalarStores] in { let OtherPredicates = [HasScalarStores] in {
def S_DCACHE_WB : SM_Inval_Pseudo <"s_dcache_wb", int_amdgcn_s_dcache_wb>; def S_DCACHE_WB : SM_Inval_Pseudo <"s_dcache_wb", int_amdgcn_s_dcache_wb>;
def S_DCACHE_WB_VOL : SM_Inval_Pseudo <"s_dcache_wb_vol", int_amdgcn_s_dcache_wb_vol>; def S_DCACHE_WB_VOL : SM_Inval_Pseudo <"s_dcache_wb_vol", int_amdgcn_s_dcache_wb_vol>;
} // End OtherPredicates = [HasScalarStores] } // End OtherPredicates = [HasScalarStores]
def S_MEMREALTIME : SM_Time_Pseudo <"s_memrealtime", int_amdgcn_s_memrealtime>;
defm S_ATC_PROBE : SM_Pseudo_Probe <"s_atc_probe", SReg_64>; defm S_ATC_PROBE : SM_Pseudo_Probe <"s_atc_probe", SReg_64>;
let is_buffer = 1 in { let is_buffer = 1 in {
defm S_ATC_PROBE_BUFFER : SM_Pseudo_Probe <"s_atc_probe_buffer", SReg_128>; defm S_ATC_PROBE_BUFFER : SM_Pseudo_Probe <"s_atc_probe_buffer", SReg_128>;
} }
} // SubtargetPredicate = isGFX8Plus } // SubtargetPredicate = isGFX8Plus
let SubtargetPredicate = HasSMemRealTime in
def S_MEMREALTIME : SM_Time_Pseudo <"s_memrealtime", int_amdgcn_s_memrealtime>;
let SubtargetPredicate = isGFX10Plus in let SubtargetPredicate = isGFX10Plus in
def S_GL1_INV : SM_Inval_Pseudo<"s_gl1_inv">; def S_GL1_INV : SM_Inval_Pseudo<"s_gl1_inv">;
let SubtargetPredicate = HasGetWaveIdInst in let SubtargetPredicate = HasGetWaveIdInst in
def S_GET_WAVEID_IN_WORKGROUP : SM_WaveId_Pseudo <"s_get_waveid_in_workgroup", int_amdgcn_s_get_waveid_in_workgroup>; def S_GET_WAVEID_IN_WORKGROUP : SM_WaveId_Pseudo <"s_get_waveid_in_workgroup", int_amdgcn_s_get_waveid_in_workgroup>;
let SubtargetPredicate = HasScalarFlatScratchInsts, Uses = [FLAT_SCR] in { let SubtargetPredicate = HasScalarFlatScratchInsts, Uses = [FLAT_SCR] in {
defm S_SCRATCH_LOAD_DWORD : SM_Pseudo_Loads <"s_scratch_load_dword", SReg_64, SReg_32_XM0_XEXEC>; defm S_SCRATCH_LOAD_DWORD : SM_Pseudo_Loads <"s_scratch_load_dword", SReg_64, SReg_32_XM0_XEXEC>;
▲ Show 20 Lines • Show All 720 Lines • Show Last 20 Lines