Add sqrt lowering from standard to ROCDL

[akuegel]

Summary

Add a lowering for sqrt from standard dialect to ROCDL.

[herhut]

Can you add a test?

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

118

SqrtOp?

[akuegel]

Fixed copy/paste bug.

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

118

Oops, copy/paste bug. Thanks for catching this :)

[akuegel]

Working on a test now.

[akuegel]

Add test.

[akuegel]

I have copied the Sqrt test for the GPUToNVVM lowering and adapted it.

[akuegel]

Frederik, it looks like there was an error on Windows during the pre-merge checks. Does that look familiar to the one you saw? Do you know if this is for real?

[akuegel]

Ok, I just checked the recent presubmit results, and all seem to fail on Windows:
https://buildkite.com/llvm-project/premerge-checks/builds

So I think this is unrelated to my change :)

[frgossen]

I saw the exact same failure and I'm pretty sure it is unrelated.

[frgossen]

Looks good. Thanks!
We probably want this for rsqrt, too.

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

70–77

You may want to expose this like we did for NVVM here.
Can be a separate CL though

[akuegel]

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

70–77

Thanks for the pointer :)
Yes, I think I will do this in a separate CL. Also Rsqrt in a separate CL.

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

void runOnOperation() override {
     OwningRewritePatternList patterns, llvmPatterns;
 
     populateGpuRewritePatterns(m.getContext(), patterns);
     applyPatternsAndFoldGreedily(m, std::move(patterns));
 
     populateVectorToLLVMConversionPatterns(converter, llvmPatterns);
     populateVectorToROCDLConversionPatterns(converter, llvmPatterns);
     populateStdToLLVMConversionPatterns(converter, llvmPatterns);
     populateGpuToROCDLConversionPatterns(converter, llvmPatterns);
     LLVMConversionTarget target(getContext());
     target.addIllegalDialect<gpu::GPUDialect>();
     target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
                         LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
-                        LLVM::Log2Op, LLVM::SinOp>();
+                        LLVM::Log2Op, LLVM::SinOp, LLVM::SqrtOp>();
     target.addIllegalOp<FuncOp>();
     target.addLegalDialect<ROCDL::ROCDLDialect>();
     // TODO: Remove once we support replacing non-root ops.
     target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
     if (failed(applyPartialConversion(m, target, std::move(llvmPatterns))))
       signalPassFailure();
   }
 };
 
 } // anonymous namespace
void mlir::populateGpuToROCDLConversionPatterns(
   patterns.insert<OpToFuncCallLowering<LogOp>>(converter, "__ocml_log_f32",
                                                "__ocml_log_f64");
   patterns.insert<OpToFuncCallLowering<Log10Op>>(converter, "__ocml_log10_f32",
                                                  "__ocml_log10_f64");
   patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",
                                                 "__ocml_log2_f64");
   patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32",
                                                "__ocml_sin_f64");
+  patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sqrt_f32",
+                                               "__ocml_sqrt_f64");
   patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32",
                                                 "__ocml_tanh_f64");
 }
 
 std::unique_ptr<OperationPass<gpu::GPUModuleOp>>
 mlir::createLowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth) {
   return std::make_unique<LowerGpuOpsToROCDLOpsPass>(indexBitwidth);
 }