[RISCV] se StringRef::getAsInteger in place of APInt's string constructor.

[lenary]

@craig.topper what was your impetus for abandoning this patch?

[craig.topper]

In D92799#2439219, @lenary wrote:

@craig.topper what was your impetus for abandoning this patch?

I accidentally hit some key combination that submitted it part way through writing the title. I resubmitted it with complete title and description right after.

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

createSysReg(StringRef Str, SMLoc S, unsigned Encoding, bool IsRV64) {
     Op->SysReg.Length = Str.size();
     Op->SysReg.Encoding = Encoding;
     Op->StartLoc = S;
     Op->IsRV64 = IsRV64;
     return Op;
   }
 
   static std::unique_ptr<RISCVOperand>
-  createVType(APInt Sew, APInt Lmul, bool Fractional, bool TailAgnostic,
+  createVType(unsigned Sew, unsigned Lmul, bool Fractional, bool TailAgnostic,
               bool MaskedoffAgnostic, SMLoc S, bool IsRV64) {
     auto Op = std::make_unique<RISCVOperand>(KindTy::VType);
-    Sew.ashrInPlace(3);
-    unsigned SewLog2 = Sew.logBase2();
-    unsigned LmulLog2 = Lmul.logBase2();
+    unsigned SewLog2 = Log2_32(Sew / 8);
+    unsigned LmulLog2 = Log2_32(Lmul);
     Op->VType.Sew = static_cast<VSEW>(SewLog2);
     if (Fractional) {
       unsigned Flmul = 8 - LmulLog2;
       Op->VType.Lmul = static_cast<VLMUL>(Flmul);
       Op->VType.Encoding =
           ((Flmul & 0x4) << 3) | ((SewLog2 & 0x7) << 2) | (Flmul & 0x3);
     } else {
       Op->VType.Lmul = static_cast<VLMUL>(LmulLog2);
OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {
   SMLoc S = getLoc();
   if (getLexer().getKind() != AsmToken::Identifier)
     return MatchOperand_NoMatch;
 
   // Parse "e8,m1,t[a|u],m[a|u]"
   StringRef Name = getLexer().getTok().getIdentifier();
   if (!Name.consume_front("e"))
     return MatchOperand_NoMatch;
-  APInt Sew(16, Name, 10);
+  unsigned Sew;
+  if (Name.getAsInteger(10, Sew))
+    return MatchOperand_NoMatch;
   if (Sew != 8 && Sew != 16 && Sew != 32 && Sew != 64 && Sew != 128 &&
       Sew != 256 && Sew != 512 && Sew != 1024)
     return MatchOperand_NoMatch;
   getLexer().Lex();
 
   if (!getLexer().is(AsmToken::Comma))
     return MatchOperand_NoMatch;
   getLexer().Lex();
 
   Name = getLexer().getTok().getIdentifier();
   if (!Name.consume_front("m"))
     return MatchOperand_NoMatch;
   // "m" or "mf"
   bool Fractional = false;
   if (Name.consume_front("f")) {
     Fractional = true;
   }
-  APInt Lmul(16, Name, 10);
+  unsigned Lmul;
+  if (Name.getAsInteger(10, Lmul))
+    return MatchOperand_NoMatch;
   if (Lmul != 1 && Lmul != 2 && Lmul != 4 && Lmul != 8)
     return MatchOperand_NoMatch;
   getLexer().Lex();
 
   if (!getLexer().is(AsmToken::Comma))
     return MatchOperand_NoMatch;
   getLexer().Lex();
 

llvm/test/MC/RISCV/rvv/invalid.s

 # CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
 
 vsetvli a2, a0, e8,m1,ma
 # CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
 
 vsetvli a2, a0, e8,m1,mu
 # CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
 
+vsetvli a2, a0, e8x,m1,tu,mu
+# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
+
+vsetvli a2, a0, e8,m1z,tu,mu
+# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
+
 vadd.vv v1, v3, v2, v4.t
 # CHECK-ERROR: operand must be v0.t
 
 vadd.vv v1, v3, v2, v0
 # CHECK-ERROR: expected '.t' suffix
 
 vadd.vv v1, v3, a0
 # CHECK-ERROR: invalid operand for instruction