[lldb] [Process/Linux] Reuse NativeRegisterContextWatchpoint_x86

[mgorny]

Note that I've only tested amd64.

[labath]

We arm bots, at least. Other arches will have to fix any build issues post commit ("if you like it, then you shoulda put a bot on it")

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux.h

 #define lldb_NativeRegisterContextLinux_h
 
 #include "Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h"
 #include "lldb/Host/common/NativeThreadProtocol.h"
 
 namespace lldb_private {
 namespace process_linux {
 
-class NativeRegisterContextLinux : public NativeRegisterContextRegisterInfo {
+class NativeRegisterContextLinux
+    : public virtual NativeRegisterContextRegisterInfo {
 public:
-  NativeRegisterContextLinux(NativeThreadProtocol &native_thread,
-                             RegisterInfoInterface *reg_info_interface_p);
-
   // This function is implemented in the NativeRegisterContextLinux_* subclasses
   // to create a new instance of the host specific NativeRegisterContextLinux.
   // The implementations can't collide as only one NativeRegisterContextLinux_*
   // variant should be compiled into the final executable.
   static std::unique_ptr<NativeRegisterContextLinux>
   CreateHostNativeRegisterContextLinux(const ArchSpec &target_arch,
                                        NativeThreadProtocol &native_thread);
 

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp

 #include "lldb/Utility/RegisterValue.h"
 
 #include "Plugins/Process/Linux/NativeProcessLinux.h"
 #include "Plugins/Process/POSIX/ProcessPOSIXLog.h"
 
 using namespace lldb_private;
 using namespace lldb_private::process_linux;
 
-NativeRegisterContextLinux::NativeRegisterContextLinux(
-    NativeThreadProtocol &native_thread,
-    RegisterInfoInterface *reg_info_interface_p)
-    : NativeRegisterContextRegisterInfo(native_thread, reg_info_interface_p) {}
-
 lldb::ByteOrder NativeRegisterContextLinux::GetByteOrder() const {
   return m_thread.GetProcess().GetByteOrder();
 }
 
 Status NativeRegisterContextLinux::ReadRegisterRaw(uint32_t reg_index,
                                                    RegisterValue &reg_value) {
   const RegisterInfo *const reg_info = GetRegisterInfoAtIndex(reg_index);
   if (!reg_info)

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
   return std::make_unique<NativeRegisterContextLinux_arm>(target_arch,
                                                            native_thread);
 }
 
 #endif // defined(__arm__)
 
 NativeRegisterContextLinux_arm::NativeRegisterContextLinux_arm(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-    : NativeRegisterContextLinux(native_thread,
-                                 new RegisterInfoPOSIX_arm(target_arch)) {
+    : NativeRegisterContextRegisterInfo(
+          native_thread, new RegisterInfoPOSIX_arm(target_arch)) {
   assert(target_arch.GetMachine() == llvm::Triple::arm);
 
   ::memset(&m_fpr, 0, sizeof(m_fpr));
   ::memset(&m_gpr_arm, 0, sizeof(m_gpr_arm));
   ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
   ::memset(&m_hbr_regs, 0, sizeof(m_hbr_regs));
 
   // 16 is just a maximum value, query hardware for actual watchpoint count

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

return std::make_unique<NativeRegisterContextLinux_arm64>(target_arch,
                                                                native_thread);
   default:
     llvm_unreachable("have no register context for architecture");
   }
 }
 
 NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-    : NativeRegisterContextLinux(native_thread,
-                                 new RegisterInfoPOSIX_arm64(target_arch)) {
+    : NativeRegisterContextRegisterInfo(
+          native_thread, new RegisterInfoPOSIX_arm64(target_arch)) {
   ::memset(&m_fpr, 0, sizeof(m_fpr));
   ::memset(&m_gpr_arm64, 0, sizeof(m_gpr_arm64));
   ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
   ::memset(&m_hbr_regs, 0, sizeof(m_hbr_regs));
   ::memset(&m_sve_header, 0, sizeof(m_sve_header));
 
   // 16 is just a maximum value, query hardware for actual watchpoint count
   m_max_hwp_supported = 16;

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp

CreateRegisterInfoInterface(const ArchSpec &target_arch) {
   } else {
     return new RegisterContextLinux_mips64(
         target_arch, NativeRegisterContextLinux_mips64::IsMSAAvailable());
   }
 }
 
 NativeRegisterContextLinux_mips64::NativeRegisterContextLinux_mips64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-    : NativeRegisterContextLinux(native_thread,
-                                 CreateRegisterInfoInterface(target_arch)) {
+    : NativeRegisterContextRegisterInfo(
+          native_thread, CreateRegisterInfoInterface(target_arch)) {
   switch (target_arch.GetMachine()) {
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
     m_reg_info.num_registers = k_num_registers_mips;
     m_reg_info.num_gpr_registers = k_num_gpr_registers_mips;
     m_reg_info.num_fpr_registers = k_num_fpr_registers_mips;
     m_reg_info.last_gpr = k_last_gpr_mips;
     m_reg_info.first_fpr = k_first_fpr_mips;

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_ppc64le.cpp

return std::make_unique<NativeRegisterContextLinux_ppc64le>(target_arch,
                                                                  native_thread);
   default:
     llvm_unreachable("have no register context for architecture");
   }
 }
 
 NativeRegisterContextLinux_ppc64le::NativeRegisterContextLinux_ppc64le(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-    : NativeRegisterContextLinux(native_thread,
-                                 new RegisterInfoPOSIX_ppc64le(target_arch)) {
+    : NativeRegisterContextRegisterInfo(
+          native_thread, new RegisterInfoPOSIX_ppc64le(target_arch)) {
   if (target_arch.GetMachine() != llvm::Triple::ppc64le) {
     llvm_unreachable("Unhandled target architecture.");
   }
 
   ::memset(&m_gpr_ppc64le, 0, sizeof(m_gpr_ppc64le));
   ::memset(&m_fpr_ppc64le, 0, sizeof(m_fpr_ppc64le));
   ::memset(&m_vmx_ppc64le, 0, sizeof(m_vmx_ppc64le));
   ::memset(&m_vsx_ppc64le, 0, sizeof(m_vsx_ppc64le));

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_s390x.cpp

 CreateRegisterInfoInterface(const ArchSpec &target_arch) {
   assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) &&
          "Register setting path assumes this is a 64-bit host");
   return new RegisterContextLinux_s390x(target_arch);
 }
 
 NativeRegisterContextLinux_s390x::NativeRegisterContextLinux_s390x(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-    : NativeRegisterContextLinux(native_thread,
-                                 CreateRegisterInfoInterface(target_arch)) {
+    : NativeRegisterContextRegisterInfo(
+          native_thread, CreateRegisterInfoInterface(target_arch)) {
   // Set up data about ranges of valid registers.
   switch (target_arch.GetMachine()) {
   case llvm::Triple::systemz:
     m_reg_info.num_registers = k_num_registers_s390x;
     m_reg_info.num_gpr_registers = k_num_gpr_registers_s390x;
     m_reg_info.num_fpr_registers = k_num_fpr_registers_s390x;
     m_reg_info.last_gpr = k_last_gpr_s390x;
     m_reg_info.first_fpr = k_first_fpr_s390x;

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.h

 //===-- NativeRegisterContextLinux_x86_64.h ---------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #if defined(__i386__) || defined(__x86_64__)
 
 #ifndef lldb_NativeRegisterContextLinux_x86_64_h
 #define lldb_NativeRegisterContextLinux_x86_64_h
 
 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
+#include "Plugins/Process/Utility/NativeRegisterContextWatchpoint_x86.h"
 #include "Plugins/Process/Utility/RegisterContext_x86.h"
 #include "Plugins/Process/Utility/lldb-x86-register-enums.h"
 #include <sys/uio.h>
 
 namespace lldb_private {
 namespace process_linux {
 
 class NativeProcessLinux;
 
-class NativeRegisterContextLinux_x86_64 : public NativeRegisterContextLinux {
+class NativeRegisterContextLinux_x86_64
+    : public NativeRegisterContextLinux,
+      public NativeRegisterContextWatchpoint_x86 {
 public:
   NativeRegisterContextLinux_x86_64(const ArchSpec &target_arch,
                                     NativeThreadProtocol &native_thread);
 
   uint32_t GetRegisterSetCount() const override;
 
   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
 
   uint32_t GetUserRegisterCount() const override;
 
   Status ReadRegister(const RegisterInfo *reg_info,
                       RegisterValue &reg_value) override;
 
   Status WriteRegister(const RegisterInfo *reg_info,
                        const RegisterValue &reg_value) override;
 
   Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
 
   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
 
-  Status IsWatchpointHit(uint32_t wp_index, bool &is_hit) override;
-
-  Status GetWatchpointHitIndex(uint32_t &wp_index,
-                               lldb::addr_t trap_addr) override;
-
-  Status IsWatchpointVacant(uint32_t wp_index, bool &is_vacant) override;
-
-  bool ClearHardwareWatchpoint(uint32_t wp_index) override;
-
-  Status ClearAllHardwareWatchpoints() override;
-
-  Status SetHardwareWatchpointWithIndex(lldb::addr_t addr, size_t size,
-                                        uint32_t watch_flags,
-                                        uint32_t wp_index);
-
-  uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
-                                 uint32_t watch_flags) override;
-
-  lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
-
-  uint32_t NumSupportedHardwareWatchpoints() override;
-
   llvm::Optional<SyscallData> GetSyscallData() override;
 
   llvm::Optional<MmapData> GetMmapData() override;
 
 protected:
   void *GetGPRBuffer() override { return &m_gpr_x86_64; }
 
   void *GetFPRBuffer() override;
struct RegInfo {
     uint32_t last_xmm;
     uint32_t first_ymm;
     uint32_t last_ymm;
     uint32_t first_mpxr;
     uint32_t last_mpxr;
     uint32_t first_mpxc;
     uint32_t last_mpxc;
     uint32_t first_dr;
+    uint32_t last_dr;
     uint32_t gpr_flags;
   };
 
   // Private member variables.
   mutable XStateType m_xstate_type;
   std::unique_ptr<FPR, llvm::FreeDeleter>
       m_xstate; // Extended States Area, named FPR for historical reasons.
   struct iovec m_iovec;
   YMM m_ymm_set;
   MPX m_mpx_set;
   RegInfo m_reg_info;
   uint64_t m_gpr_x86_64[k_num_gpr_registers_x86_64];
   uint32_t m_fctrl_offset_in_userarea;
 
   // Private member methods.
   bool IsCPUFeatureAvailable(RegSet feature_code) const;
 
   bool IsRegisterSetAvailable(uint32_t set_index) const;
 
   bool IsGPR(uint32_t reg_index) const;
 
   bool IsFPR(uint32_t reg_index) const;
 
+  bool IsDR(uint32_t reg_index) const;
+
   bool CopyXSTATEtoYMM(uint32_t reg_index, lldb::ByteOrder byte_order);
 
   bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
 
   bool IsAVX(uint32_t reg_index) const;
 
   bool CopyXSTATEtoMPX(uint32_t reg);
 

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

static std::size_t GetXSTATESize() {
   // Then fetch the maximum size of the area.
   if (!get_cpuid_count(0x0d, 0, &eax, &ebx, &ecx, &edx))
     return sizeof(FPR);
   return std::max<std::size_t>(ecx, sizeof(FPR));
 }
 
 NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-    : NativeRegisterContextLinux(native_thread,
-                                 CreateRegisterInfoInterface(target_arch)),
+    : NativeRegisterContextRegisterInfo(
+          native_thread, CreateRegisterInfoInterface(target_arch)),
       m_xstate_type(XStateType::Invalid), m_ymm_set(), m_mpx_set(),
       m_reg_info(), m_gpr_x86_64() {
   // Set up data about ranges of valid registers.
   switch (target_arch.GetMachine()) {
   case llvm::Triple::x86:
     m_reg_info.num_registers = k_num_registers_i386;
     m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
     m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
case llvm::Triple::x86:
     m_reg_info.last_xmm = lldb_xmm7_i386;
     m_reg_info.first_ymm = lldb_ymm0_i386;
     m_reg_info.last_ymm = lldb_ymm7_i386;
     m_reg_info.first_mpxr = lldb_bnd0_i386;
     m_reg_info.last_mpxr = lldb_bnd3_i386;
     m_reg_info.first_mpxc = lldb_bndcfgu_i386;
     m_reg_info.last_mpxc = lldb_bndstatus_i386;
     m_reg_info.first_dr = lldb_dr0_i386;
+    m_reg_info.last_dr = lldb_dr7_i386;
     m_reg_info.gpr_flags = lldb_eflags_i386;
     break;
   case llvm::Triple::x86_64:
     m_reg_info.num_registers = k_num_registers_x86_64;
     m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64;
     m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64;
     m_reg_info.num_avx_registers = k_num_avx_registers_x86_64;
     m_reg_info.num_mpx_registers = k_num_mpx_registers_x86_64;
     m_reg_info.last_gpr = k_last_gpr_x86_64;
     m_reg_info.first_fpr = k_first_fpr_x86_64;
     m_reg_info.last_fpr = k_last_fpr_x86_64;
     m_reg_info.first_st = lldb_st0_x86_64;
     m_reg_info.last_st = lldb_st7_x86_64;
     m_reg_info.first_mm = lldb_mm0_x86_64;
     m_reg_info.last_mm = lldb_mm7_x86_64;
     m_reg_info.first_xmm = lldb_xmm0_x86_64;
     m_reg_info.last_xmm = lldb_xmm15_x86_64;
     m_reg_info.first_ymm = lldb_ymm0_x86_64;
     m_reg_info.last_ymm = lldb_ymm15_x86_64;
     m_reg_info.first_mpxr = lldb_bnd0_x86_64;
     m_reg_info.last_mpxr = lldb_bnd3_x86_64;
     m_reg_info.first_mpxc = lldb_bndcfgu_x86_64;
     m_reg_info.last_mpxc = lldb_bndstatus_x86_64;
     m_reg_info.first_dr = lldb_dr0_x86_64;
+    m_reg_info.last_dr = lldb_dr7_x86_64;
     m_reg_info.gpr_flags = lldb_rflags_x86_64;
     break;
   default:
     assert(false && "Unhandled target architecture.");
     break;
   }
 
   std::size_t xstate_size = GetXSTATESize();
Status NativeRegisterContextLinux_x86_64::WriteRegister(
   const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB];
   if (reg_index == LLDB_INVALID_REGNUM)
     return Status("no lldb regnum for %s", reg_info && reg_info->name
                                                ? reg_info->name
                                                : "<unknown register>");
 
   UpdateXSTATEforWrite(reg_index);
 
-  if (IsGPR(reg_index))
+  if (IsGPR(reg_index) || IsDR(reg_index))
     return WriteRegisterRaw(reg_index, reg_value);
 
   if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) {
     if (reg_info->encoding == lldb::eEncodingVector) {
       if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st)
         ::memcpy(m_xstate->fxsave.stmm[reg_index - m_reg_info.first_st].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
 
bool NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const {
   return reg_index <= m_reg_info.last_gpr;
 }
 
 bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const {
   return (m_reg_info.first_fpr <= reg_index &&
           reg_index <= m_reg_info.last_fpr);
 }
 
+bool NativeRegisterContextLinux_x86_64::IsDR(uint32_t reg_index) const {
+  return (m_reg_info.first_dr <= reg_index &&
+          reg_index <= m_reg_info.last_dr);
+}
+
 Status NativeRegisterContextLinux_x86_64::WriteFPR() {
   switch (m_xstate_type) {
   case XStateType::FXSAVE:
     return WriteRegisterSet(
         &m_iovec, sizeof(m_xstate->fxsave),
         fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
   case XStateType::XSAVE:
     return WriteRegisterSet(&m_iovec, sizeof(m_xstate->xsave), NT_X86_XSTATE);
::memcpy(m_xstate->xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
              m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, sizeof(MPXReg));
   } else {
     ::memcpy(m_xstate->xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
              m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, sizeof(MPXCsr));
   }
   return true;
 }
 
-Status NativeRegisterContextLinux_x86_64::IsWatchpointHit(uint32_t wp_index,
-                                                          bool &is_hit) {
-  if (wp_index >= NumSupportedHardwareWatchpoints())
-    return Status("Watchpoint index out of range");
-
-  RegisterValue reg_value;
-  Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value);
-  if (error.Fail()) {
-    is_hit = false;
-    return error;
-  }
-
-  uint64_t status_bits = reg_value.GetAsUInt64();
-
-  is_hit = status_bits & (1 << wp_index);
-
-  return error;
-}
-
-Status NativeRegisterContextLinux_x86_64::GetWatchpointHitIndex(
-    uint32_t &wp_index, lldb::addr_t trap_addr) {
-  uint32_t num_hw_wps = NumSupportedHardwareWatchpoints();
-  for (wp_index = 0; wp_index < num_hw_wps; ++wp_index) {
-    bool is_hit;
-    Status error = IsWatchpointHit(wp_index, is_hit);
-    if (error.Fail()) {
-      wp_index = LLDB_INVALID_INDEX32;
-      return error;
-    } else if (is_hit) {
-      return error;
-    }
-  }
-  wp_index = LLDB_INVALID_INDEX32;
-  return Status();
-}
-
-Status NativeRegisterContextLinux_x86_64::IsWatchpointVacant(uint32_t wp_index,
-                                                             bool &is_vacant) {
-  if (wp_index >= NumSupportedHardwareWatchpoints())
-    return Status("Watchpoint index out of range");
-
-  RegisterValue reg_value;
-  Status error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
-  if (error.Fail()) {
-    is_vacant = false;
-    return error;
-  }
-
-  uint64_t control_bits = reg_value.GetAsUInt64();
-
-  is_vacant = !(control_bits & (1 << (2 * wp_index)));
-
-  return error;
-}
-
-Status NativeRegisterContextLinux_x86_64::SetHardwareWatchpointWithIndex(
-    lldb::addr_t addr, size_t size, uint32_t watch_flags, uint32_t wp_index) {
-
-  if (wp_index >= NumSupportedHardwareWatchpoints())
-    return Status("Watchpoint index out of range");
-
-  // Read only watchpoints aren't supported on x86_64. Fall back to read/write
-  // waitchpoints instead.
-  // TODO: Add logic to detect when a write happens and ignore that watchpoint
-  // hit.
-  if (watch_flags == 0x2)
-    watch_flags = 0x3;
-
-  if (watch_flags != 0x1 && watch_flags != 0x3)
-    return Status("Invalid read/write bits for watchpoint");
-
-  if (size != 1 && size != 2 && size != 4 && size != 8)
-    return Status("Invalid size for watchpoint");
-
-  bool is_vacant;
-  Status error = IsWatchpointVacant(wp_index, is_vacant);
-  if (error.Fail())
-    return error;
-  if (!is_vacant)
-    return Status("Watchpoint index not vacant");
-
-  RegisterValue reg_value;
-  error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
-  if (error.Fail())
-    return error;
-
-  // for watchpoints 0, 1, 2, or 3, respectively, set bits 1, 3, 5, or 7
-  uint64_t enable_bit = 1 << (2 * wp_index);
-
-  // set bits 16-17, 20-21, 24-25, or 28-29
-  // with 0b01 for write, and 0b11 for read/write
-  uint64_t rw_bits = watch_flags << (16 + 4 * wp_index);
-
-  // set bits 18-19, 22-23, 26-27, or 30-31
-  // with 0b00, 0b01, 0b10, or 0b11
-  // for 1, 2, 8 (if supported), or 4 bytes, respectively
-  uint64_t size_bits = (size == 8 ? 0x2 : size - 1) << (18 + 4 * wp_index);
-
-  uint64_t bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index));
-
-  uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask;
-
-  control_bits |= enable_bit | rw_bits | size_bits;
-
-  error = WriteRegisterRaw(m_reg_info.first_dr + wp_index, RegisterValue(addr));
-  if (error.Fail())
-    return error;
-
-  error =
-      WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits));
-  if (error.Fail())
-    return error;
-
-  error.Clear();
-  return error;
-}
-
-bool NativeRegisterContextLinux_x86_64::ClearHardwareWatchpoint(
-    uint32_t wp_index) {
-  if (wp_index >= NumSupportedHardwareWatchpoints())
-    return false;
-
-  RegisterValue reg_value;
-
-  // for watchpoints 0, 1, 2, or 3, respectively, clear bits 0, 1, 2, or 3 of
-  // the debug status register (DR6)
-  Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value);
-  if (error.Fail())
-    return false;
-  uint64_t bit_mask = 1 << wp_index;
-  uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask;
-  error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits));
-  if (error.Fail())
-    return false;
-
-  // for watchpoints 0, 1, 2, or 3, respectively, clear bits {0-1,16-19},
-  // {2-3,20-23}, {4-5,24-27}, or {6-7,28-31} of the debug control register
-  // (DR7)
-  error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
-  if (error.Fail())
-    return false;
-  bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index));
-  uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask;
-  return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits))
-      .Success();
-}
-
-Status NativeRegisterContextLinux_x86_64::ClearAllHardwareWatchpoints() {
-  RegisterValue reg_value;
-
-  // clear bits {0-4} of the debug status register (DR6)
-  Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value);
-  if (error.Fail())
-    return error;
-  uint64_t bit_mask = 0xF;
-  uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask;
-  error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits));
-  if (error.Fail())
-    return error;
-
-  // clear bits {0-7,16-31} of the debug control register (DR7)
-  error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
-  if (error.Fail())
-    return error;
-  bit_mask = 0xFF | (0xFFFF << 16);
-  uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask;
-  return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits));
-}
-
-uint32_t NativeRegisterContextLinux_x86_64::SetHardwareWatchpoint(
-    lldb::addr_t addr, size_t size, uint32_t watch_flags) {
-  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
-  const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
-  for (uint32_t wp_index = 0; wp_index < num_hw_watchpoints; ++wp_index) {
-    bool is_vacant;
-    Status error = IsWatchpointVacant(wp_index, is_vacant);
-    if (is_vacant) {
-      error = SetHardwareWatchpointWithIndex(addr, size, watch_flags, wp_index);
-      if (error.Success())
-        return wp_index;
-    }
-    if (error.Fail() && log) {
-      LLDB_LOGF(log, "NativeRegisterContextLinux_x86_64::%s Error: %s",
-                __FUNCTION__, error.AsCString());
-    }
-  }
-  return LLDB_INVALID_INDEX32;
-}
-
-lldb::addr_t
-NativeRegisterContextLinux_x86_64::GetWatchpointAddress(uint32_t wp_index) {
-  if (wp_index >= NumSupportedHardwareWatchpoints())
-    return LLDB_INVALID_ADDRESS;
-  RegisterValue reg_value;
-  if (ReadRegisterRaw(m_reg_info.first_dr + wp_index, reg_value).Fail())
-    return LLDB_INVALID_ADDRESS;
-  return reg_value.GetAsUInt64();
-}
-
-uint32_t NativeRegisterContextLinux_x86_64::NumSupportedHardwareWatchpoints() {
-  // Available debug address registers: dr0, dr1, dr2, dr3
-  return 4;
-}
-
 uint32_t
 NativeRegisterContextLinux_x86_64::GetPtraceOffset(uint32_t reg_index) {
   // If register is MPX, remove extra factor from gdb offset
   return GetRegisterInfoAtIndex(reg_index)->byte_offset -
          (IsMPX(reg_index) ? 128 : 0);
 }
 
 llvm::Optional<NativeRegisterContextLinux::SyscallData>