[IndVars] Support different types of ExitCount when optimizing exit conds

[mkazantsev]

Summary

In some cases we can handle IV and iter count of different types. It's a typical situation
after IV have been widened. This patch adds support for such cases, when legal.

[mkazantsev]

Rebased

[skatkov]

lgtm

llvm/lib/Transforms/Scalar/IndVarSimplify.cpp

static ExitCondAnalysisResult analyzeCond(const Loop *L, BranchInst *BI,
 
   // TODO: Support steps other than +/- 1.
   const SCEV *Step = AR->getOperand(1);
   auto *One = SE->getOne(Step->getType());
   auto *MinusOne = SE->getNegativeSCEV(One);
   if (Step != One && Step != MinusOne)
     return CannotOptimize;
 
-  // Type mismatch here means that MaxIter is potentially larger than max
-  // unsigned value in start type, which mean we cannot prove no wrap for the
-  // indvar.
-  if (AR->getType() != MaxIter->getType())
+  auto *ARTy = AR->getType();
+  auto *MaxIterTy = MaxIter->getType();
+  if (ARTy != MaxIterTy) {
+    // If AR's type is wider, just extend the type of max iter.
+    if (SE->getTypeSizeInBits(ARTy) > SE->getTypeSizeInBits(MaxIterTy))
+      MaxIter = SE->getZeroExtendExpr(MaxIter, ARTy);
+    else {
+      auto *MaxAllowedIter = SE->getZeroExtendExpr(MinusOne, MaxIterTy);
+      if (!SE->isKnownPredicateAt(ICmpInst::ICMP_ULE, MaxIter, MaxAllowedIter, BI))
         return CannotOptimize;
+      MaxIter = SE->getTruncateExpr(MaxIter, ARTy);
+    }
+  }
 
 
   if (SkipLastIter)
     MaxIter = SE->getMinusSCEV(MaxIter, One, SCEV::FlagNUW);
 
   // First, check the predicate on the 1st iteration.
   const SCEV *Start = AR->getStart();
   bool StartCondProved = SE->isKnownPredicateAt(Pred, Start, RHSS, BI);

llvm/test/Transforms/IndVarSimplify/predicated_ranges.ll

 
 exit:
   ret void
 
 fail:
   unreachable
 }
 
+define void @test_can_predicate_trunc_unsigned(i32* %p, i32* %arr) {
+; CHECK-LABEL: @test_can_predicate_trunc_unsigned(
+; CHECK-NEXT:  preheader:
+; CHECK-NEXT:    [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[START:%.*]] = zext i32 [[LEN]] to i64
+; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[LEN]], -1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[START]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT:    [[ZERO_COND:%.*]] = icmp eq i64 [[IV]], 0
+; CHECK-NEXT:    br i1 [[ZERO_COND]], label [[EXIT:%.*]], label [[RANGE_CHECK_BLOCK:%.*]]
+; CHECK:       range_check_block:
+; CHECK-NEXT:    [[IV_NEXT]] = sub nsw i64 [[IV]], 1
+; CHECK-NEXT:    [[NARROW:%.*]] = trunc i64 [[IV_NEXT]] to i32
+; CHECK-NEXT:    [[RANGE_CHECK1:%.*]] = icmp ult i32 [[TMP0]], [[LEN]]
+; CHECK-NEXT:    br i1 [[RANGE_CHECK1]], label [[BACKEDGE]], label [[FAIL:%.*]]
+; CHECK:       backedge:
+; CHECK-NEXT:    [[EL_PTR:%.*]] = getelementptr i32, i32* [[ARR:%.*]], i64 [[IV]]
+; CHECK-NEXT:    [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT:    [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
+; CHECK-NEXT:    br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+; CHECK:       fail:
+; CHECK-NEXT:    unreachable
+;
+preheader:
+  %len = load i32, i32* %p
+  %start = zext i32 %len to i64
+  br label %loop
+
+loop:
+  %iv = phi i64 [%start, %preheader], [%iv.next, %backedge]
+  %zero_cond = icmp eq i64 %iv, 0
+  br i1 %zero_cond, label %exit, label %range_check_block
+
+range_check_block:
+  %iv.next = sub i64 %iv, 1
+  %narrow = trunc i64 %iv.next to i32
+  %range_check = icmp ult i32 %narrow, %len
+  br i1 %range_check, label %backedge, label %fail
+
+backedge:
+  %el.ptr = getelementptr i32, i32* %arr, i64 %iv
+  %el = load i32, i32* %el.ptr
+  %loop.cond = icmp eq i32 %el, 0
+  br i1 %loop.cond, label %loop, label %exit
+
+exit:
+  ret void
+
+fail:
+  unreachable
+}
+
 !0 = !{i32 0, i32 2147483647}