This patch enables the the Cortex-A55 model, which we can apply after we're happy with the schedmodel improvements that we still need to do.
The added LLVM-MCA test is based on all the basic A64 instruction taken from this disassembler test:
llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
In a follow up, we can complete and fill in other instructions.
Can you remove most of these msr/mrs's. We only need 1. Maybe same for dsb/dmb, they have little value in scheduling, usually.