[AMDGPU] Consider all SGPR uses as unique in constant bus verify

[critson]

Summary

Fix the verifier so that overlapping SGPR operands are counted
independently. We cannot assume that overlapping SGPR accesses
only count as a single constant bus use.
The exception is implicit uses which do not add to constant bus
usage (only) when overlapping.

[arsenm]

Needs test

[critson]

Add basic test.

[critson]

In D87748#2276670, @arsenm wrote:

Needs test

I am not exactly sure kind of test is best for this?
I have added a XFAIL test which violates the modified verifier, but this is "expensive" in terms of time to failure.

[arsenm]

llvm/test/CodeGen/AMDGPU/constant-bus-violations.mir

1

You can run with not --crash and check the error message, this shouldn't use xfail

15

Add verify- to the test name?

[critson]

Improve test.

[rampitec]

LGTM

[arsenm]

llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir

16 ↗

(On Diff #293425)

This error should also be hit for gfx9

[critson]

llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir

16 ↗

(On Diff #293425)

It does, but compiler dies on first violation.
I can break this test into two files if you want me to check it?

[arsenm]

llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir

16 ↗

(On Diff #293425)

I forgot about that problem. It's probably not worth splitting it

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

if (Desc.getOpcode() != AMDGPU::V_WRITELANE_B32
 
     unsigned ConstantBusCount = 0;
     unsigned LiteralCount = 0;
 
     if (AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::imm) != -1)
       ++ConstantBusCount;
 
     SmallVector<Register, 2> SGPRsUsed;
-    Register SGPRUsed = findImplicitSGPRRead(MI);
-    if (SGPRUsed != AMDGPU::NoRegister) {
-      ++ConstantBusCount;
-      SGPRsUsed.push_back(SGPRUsed);
-    }
+    Register SGPRUsed;
 
     for (int OpIdx : OpIndices) {
       if (OpIdx == -1)
         break;
       const MachineOperand &MO = MI.getOperand(OpIdx);
       if (usesConstantBus(MRI, MO, MI.getDesc().OpInfo[OpIdx])) {
         if (MO.isReg()) {
           SGPRUsed = MO.getReg();
-          if (llvm::all_of(SGPRsUsed, [this, SGPRUsed](unsigned SGPR) {
-                return !RI.regsOverlap(SGPRUsed, SGPR);
+          if (llvm::all_of(SGPRsUsed, [SGPRUsed](unsigned SGPR) {
+                return SGPRUsed != SGPR;
               })) {
             ++ConstantBusCount;
             SGPRsUsed.push_back(SGPRUsed);
           }
         } else {
           ++ConstantBusCount;
           ++LiteralCount;
         }
       }
     }
+
+    SGPRUsed = findImplicitSGPRRead(MI);
+    if (SGPRUsed != AMDGPU::NoRegister) {
+      // Implicit uses may safely overlap true overands
+      if (llvm::all_of(SGPRsUsed, [this, SGPRUsed](unsigned SGPR) {
+            return !RI.regsOverlap(SGPRUsed, SGPR);
+          })) {
+        ++ConstantBusCount;
+        SGPRsUsed.push_back(SGPRUsed);
+      }
+    }
+
     // v_writelane_b32 is an exception from constant bus restriction:
     // vsrc0 can be sgpr, const or m0 and lane select sgpr, m0 or inline-const
     if (ConstantBusCount > ST.getConstantBusLimit(Opcode) &&
         Opcode != AMDGPU::V_WRITELANE_B32) {
       ErrInfo = "VOP* instruction violates constant bus restriction";
       return false;
     }
 

llvm/test/CodeGen/AMDGPU/constant-bus-violations.mir

+# XFAIL: *
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass machineverifier -o - %s | FileCheck -check-prefix=GCN %s
+
+# GCN-LABEL: name: sgpr_reuse
+# GCN: $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, -1, killed $sgpr0_sgpr1, implicit $exec
+---
+name:           sgpr_reuse
+liveins:
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '' }
+body:            |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+    $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, -1, killed $sgpr0_sgpr1, implicit $exec
+...
+