[RISCV][ASAN] mark asan as supported for RISCV and enable tests

[EccoTheDolphin]

Summary

Port address sanitizer to RISCV architecture

This change allows using ASAN on RISCV architecture. The majority of existing
tests are passing. With few exceptions (see below). Tests we run on qemu and
on "HiFive Unleashed" board.

Tests run:

Asan-riscv64-inline-Test  - pass
Asan-riscv64-inline-Noinst-Test  - pass
Asan-riscv64-calls-Noinst-Test  - pass
Asan-riscv64-calls-Test  - pass

Lit tests:

RISCV64LinuxConfig (282 supported, few failures)
RISCV64LinuxDynamicConfig (289 supported, few failures)

Lit failures:

asan_and_llvm_coverage_test.cpp - missing libclang_rt.profile-riscv64.a
deep_stack_uaf.cpp - asan works, but backtrace misses some calls
malloc_context_size.cpp - asan works, but backtrace misses some calls
malloc_delete_mismatch.cpp - asan works, but backtrace misses some calls
plugin_wrong_frame_number_bug.cpp - asan works, but backtrace misses some calls
stack-trace-dlclose.cpp - asan works, but backtrace misses some calls
strndup_oob_test.cpp - asan works, but backtrace misses some calls
static_tls.cpp - "Can't guess glibc version" (under debugging)

These failures are under debugging currently and shall be addressed in a
subsequent commits

[EccoTheDolphin]

uploaded the patch by mistake. Will try to re-upload in a proper way once I figure out how to use the arc tool properly.

[EccoTheDolphin]

Port addres sanititizers to RISCV architecture

This change allows using ASAN on RISCV architecture. The majoirity of existing
tests are passing. With few exceptions (see below). Tests we run on qemu and
on "HiFive Unleashed" board.

Tests run:

Asan-riscv64-inline-Test  - pass
Asan-riscv64-inline-Noinst-Test  - pass
Asan-riscv64-calls-Noinst-Test  - pass
Asan-riscv64-calls-Test  - pass

Lit tests:

RISCV64LinuxConfig (282 supported, few failures)
RISCV64LinuxDynamicConfig (289 supported, few failures)

Lit failures:

asan_and_llvm_coverage_test.cpp - missing libclang_rt.profile-riscv64.a
deep_stack_uaf.cpp - asan works, but backtrace misses some calls
malloc_context_size.cpp - asan works, but backtrace misses some calls
malloc_delete_mismatch.cpp - asan works, but backtrace misses some calls
plugin_wrong_frame_number_bug.cpp - asan works, but backtrace misses some calls
stack-trace-dlclose.cpp - asan works, but backtrace misses some calls
strndup_oob_test.cpp - asan works, but backtrace misses some calls
static_tls.cpp - "Can't guess glibc version" (under debugging)

These failures are under debuggng currently and shall be addressed in a
subsequent commits

[EccoTheDolphin]

[RISCV][ASAN] implementation of internal syscalls wrappers for riscv

[1/11] of commits implementing asan port of RISCV

[EccoTheDolphin]

restore combined diff

[EccoTheDolphin]

restore combined diff

[EccoTheDolphin]

fixup some formatting issues

[EccoTheDolphin]

this huge change is abandoned in favor of a more digestible https://reviews.llvm.org/D87582

compiler-rt/cmake/config-ix.cmake

 if(APPLE)
   set(ARM64 arm64)
   set(ARM32 armv7 armv7s armv7k)
   set(X86_64 x86_64 x86_64h)
 endif()
 
 set(ALL_SANITIZER_COMMON_SUPPORTED_ARCH ${X86} ${X86_64} ${PPC64} ${RISCV64}
     ${ARM32} ${ARM64} ${MIPS32} ${MIPS64} ${S390X} ${SPARC} ${SPARCV9})
-set(ALL_ASAN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64}
+set(ALL_ASAN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${RISCV64}
     ${MIPS32} ${MIPS64} ${PPC64} ${S390X} ${SPARC} ${SPARCV9})
 set(ALL_CRT_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${RISCV32} ${RISCV64})
 set(ALL_DFSAN_SUPPORTED_ARCH ${X86_64} ${MIPS64} ${ARM64})
 
 if(ANDROID)
   set(OS_NAME "Android")
 else()
   set(OS_NAME "${CMAKE_SYSTEM_NAME}")

compiler-rt/lib/asan/asan_allocator.h

 const uptr kAllocatorSpace = ~(uptr)0;
 const uptr kAllocatorSize  =  0x20000000000ULL;  // 2T.
 typedef DefaultSizeClassMap SizeClassMap;
 # elif defined(__aarch64__) && SANITIZER_ANDROID
 // Android needs to support 39, 42 and 48 bit VMA.
 const uptr kAllocatorSpace =  ~(uptr)0;
 const uptr kAllocatorSize  =  0x2000000000ULL;  // 128G.
 typedef VeryCompactSizeClassMap SizeClassMap;
+# elif (defined(__riscv) && (__riscv_xlen == 64))
+const uptr kAllocatorSpace =  ~(uptr)0;
+const uptr kAllocatorSize  =  0x2000000000ULL;  // 128G.
+typedef VeryDenseSizeClassMap SizeClassMap;
 # elif defined(__aarch64__)
 // AArch64/SANITIZER_CAN_USE_ALLOCATOR64 is only for 42-bit VMA
 // so no need to different values for different VMA.
 const uptr kAllocatorSpace =  0x10000000000ULL;
 const uptr kAllocatorSize  =  0x10000000000ULL;  // 3T.
 typedef DefaultSizeClassMap SizeClassMap;
 #elif defined(__sparc__)
 const uptr kAllocatorSpace = ~(uptr)0;

compiler-rt/lib/asan/asan_interceptors.h

 #endif
 
 #if SANITIZER_LINUX && !SANITIZER_ANDROID
 # define ASAN_INTERCEPT___STRDUP 1
 #else
 # define ASAN_INTERCEPT___STRDUP 0
 #endif
 
 #if SANITIZER_LINUX && (defined(__arm__) || defined(__aarch64__) || \
-                        defined(__i386__) || defined(__x86_64__))
+                        defined(__i386__) || defined(__x86_64__) || \
+                        (defined(__riscv) && (__riscv_xlen == 64)))
 # define ASAN_INTERCEPT_VFORK 1
 #else
 # define ASAN_INTERCEPT_VFORK 0
 #endif
 
 #if SANITIZER_NETBSD
 # define ASAN_INTERCEPT_PTHREAD_ATFORK 1
 #else

compiler-rt/lib/asan/asan_interceptors_vfork.S

 #include "sanitizer_common/sanitizer_asm.h"
 
 #if defined(__linux__)
 #define COMMON_INTERCEPTOR_SPILL_AREA __asan_extra_spill_area
 #define COMMON_INTERCEPTOR_HANDLE_VFORK __asan_handle_vfork
 #include "sanitizer_common/sanitizer_common_interceptors_vfork_aarch64.inc.S"
+#include "sanitizer_common/sanitizer_common_interceptors_vfork_riscv64.inc.S"
 #include "sanitizer_common/sanitizer_common_interceptors_vfork_arm.inc.S"
 #include "sanitizer_common/sanitizer_common_interceptors_vfork_x86_64.inc.S"
 #include "sanitizer_common/sanitizer_common_interceptors_vfork_i386.inc.S"
 #endif
 
 NO_EXEC_STACK_DIRECTIVE

compiler-rt/lib/asan/asan_mapping.h

 //
 // Default Linux/AArch64 (39-bit VMA) mapping:
 // || `[0x2000000000, 0x7fffffffff]` || highmem    ||
 // || `[0x1400000000, 0x1fffffffff]` || highshadow ||
 // || `[0x1200000000, 0x13ffffffff]` || shadowgap  ||
 // || `[0x1000000000, 0x11ffffffff]` || lowshadow  ||
 // || `[0x0000000000, 0x0fffffffff]` || lowmem     ||
 //
+// Riscv has only 38 bits for task size
+// Low mem size is set with kRiscv64_ShadowOffset64 in compiler-rt/lib/asan/asan_allocator.h
+// and in llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp with kRiscv64_ShadowOffset64 
+// High mem top border is set with GetMaxVirtualAddress() in
+// compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
+// Default Linux/RISCV64 Sv39/Sv48 mapping:
+// || `[0x000820000000, 0x003fffffffff]` || HighMem    ||
+// || `[0x000124000000, 0x00081fffffff]` || HighShadow ||
+// || `[0x000024000000, 0x000123ffffff]` || ShadowGap  ||
+// || `[0x000020000000, 0x000023ffffff]` || LowShadow  ||
+// || `[0x000000000000, 0x00001fffffff]` || LowMem     ||
+//
 // Default Linux/AArch64 (42-bit VMA) mapping:
 // || `[0x10000000000, 0x3ffffffffff]` || highmem    ||
 // || `[0x0a000000000, 0x0ffffffffff]` || highshadow ||
 // || `[0x09000000000, 0x09fffffffff]` || shadowgap  ||
 // || `[0x08000000000, 0x08fffffffff]` || lowshadow  ||
 // || `[0x00000000000, 0x07fffffffff]` || lowmem     ||
 //
 // Default Linux/S390 mapping:

 static const u64 kDefaultShadowScale = SANITIZER_MYRIAD2 ? 5 : 3;
 #endif
 static const u64 kDefaultShadowSentinel = ~(uptr)0;
 static const u64 kDefaultShadowOffset32 = 1ULL << 29;  // 0x20000000
 static const u64 kDefaultShadowOffset64 = 1ULL << 44;
 static const u64 kDefaultShort64bitShadowOffset =
     0x7FFFFFFF & (~0xFFFULL << kDefaultShadowScale);  // < 2G.
 static const u64 kAArch64_ShadowOffset64 = 1ULL << 36;
+static const u64 kRiscv64_ShadowOffset64 = 0x20000000;
 static const u64 kMIPS32_ShadowOffset32 = 0x0aaa0000;
 static const u64 kMIPS64_ShadowOffset64 = 1ULL << 37;
 static const u64 kPPC64_ShadowOffset64 = 1ULL << 44;
 static const u64 kSystemZ_ShadowOffset64 = 1ULL << 52;
 static const u64 kSPARC64_ShadowOffset64 = 1ULL << 43;  // 0x80000000000
 static const u64 kFreeBSD_ShadowOffset32 = 1ULL << 30;  // 0x40000000
 static const u64 kFreeBSD_ShadowOffset64 = 1ULL << 46;  // 0x400000000000
 static const u64 kNetBSD_ShadowOffset32 = 1ULL << 30;  // 0x40000000

 #  else
 #    define SHADOW_OFFSET kDefaultShadowOffset32
 #  endif
 #else
 #  if SANITIZER_IOS
 #    define SHADOW_OFFSET __asan_shadow_memory_dynamic_address
 #  elif SANITIZER_MAC && defined(__aarch64__)
 #    define SHADOW_OFFSET __asan_shadow_memory_dynamic_address
+#  elif (defined(__riscv) && (__riscv_xlen == 64))
+#    define SHADOW_OFFSET kRiscv64_ShadowOffset64
 #  elif defined(__aarch64__)
 #    define SHADOW_OFFSET kAArch64_ShadowOffset64
 #  elif defined(__powerpc64__)
 #    define SHADOW_OFFSET kPPC64_ShadowOffset64
 #  elif defined(__s390x__)
 #    define SHADOW_OFFSET kSystemZ_ShadowOffset64
 #  elif SANITIZER_FREEBSD
 #    define SHADOW_OFFSET kFreeBSD_ShadowOffset64

compiler-rt/lib/asan/asan_shadow_setup.cpp

ReserveShadowMemoryRange(GapShadowBeg, GapShadowEnd,
                              "unprotected gap shadow");
     return;
   }
   __sanitizer::ProtectGap(addr, size, kZeroBaseShadowStart,
                           kZeroBaseMaxShadowStart);
 }
 
 static void MaybeReportLinuxPIEBug() {
-#if SANITIZER_LINUX && (defined(__x86_64__) || defined(__aarch64__))
+#if SANITIZER_LINUX && (defined(__x86_64__) || defined(__aarch64__) || \
+                        (defined(__riscv) && (__riscv_xlen == 64)))
   Report("This might be related to ELF_ET_DYN_BASE change in Linux 4.12.\n");
   Report(
       "See https://github.com/google/sanitizers/issues/856 for possible "
       "workarounds.\n");
 #endif
 }
 
 void InitializeShadowMemory() {

compiler-rt/lib/asan/scripts/asan_symbolize.py

if fix_filename_patterns:
     for path_to_cut in fix_filename_patterns:
       file_name = re.sub('.*' + path_to_cut, '', file_name)
   file_name = re.sub('.*asan_[a-z_]*.(cc|cpp):[0-9]*', '_asan_rtl_', file_name)
   file_name = re.sub('.*crtstuff.c:0', '???:0', file_name)
   return file_name
 
 def is_valid_arch(s):
   return s in ["i386", "x86_64", "x86_64h", "arm", "armv6", "armv7", "armv7s",
-               "armv7k", "arm64", "powerpc64", "powerpc64le", "s390x", "s390"]
+               "armv7k", "arm64", "powerpc64", "powerpc64le", "s390x", "s390",
+               "riscv64"]
 
 def guess_arch(addr):
   # Guess which arch we're running. 10 = len('0x') + 8 hex digits.
   if len(addr) > 10:
     return 'x86_64'
   else:
     return 'i386'
 

compiler-rt/lib/asan/tests/asan_test.cpp

NOINLINE void SigLongJmpFunc1(sigjmp_buf buf) {
   int b;
 
   int *A = Ident(&a);
   int *B = Ident(&b);
   *A = *B;
   siglongjmp(buf, 1);
 }
 
 #if !defined(__ANDROID__) && !defined(__arm__) && \
     !defined(__aarch64__) && !defined(__mips__) && \
-    !defined(__mips64) && !defined(__s390__)
+    !defined(__mips64) && !defined(__s390__) && \
+    !(defined(__riscv) && (__riscv_xlen == 64))
 NOINLINE void BuiltinLongJmpFunc1(jmp_buf buf) {
   // create three red zones for these two stack objects.
   int a;
   int b;
 
   int *A = Ident(&a);
   int *B = Ident(&b);
   *A = *B;
   __builtin_longjmp((void**)buf, 1);
 }
 
 // Does not work on ARM:
 // https://github.com/google/sanitizers/issues/185
 TEST(AddressSanitizer, BuiltinLongJmpTest) {
   static jmp_buf buf;
   if (!__builtin_setjmp((void**)buf)) {
     BuiltinLongJmpFunc1(buf);
   } else {
     TouchStackFunc();
   }
 }
 #endif  // !defined(__ANDROID__) && !defined(__arm__) &&
         // !defined(__aarch64__) && !defined(__mips__)
         // !defined(__mips64) && !defined(__s390__)
+        // !defined(__riscv) && (__riscv_xlen == 64)
 
 TEST(AddressSanitizer, UnderscopeLongJmpTest) {
   static jmp_buf buf;
   if (!_setjmp(buf)) {
     UnderscopeLongJmpFunc1(buf);
   } else {
     TouchStackFunc();
   }

compiler-rt/lib/builtins/clear_cache.c

 #endif
 
 #if defined(__linux__) && defined(__mips__)
 #include <sys/cachectl.h>
 #include <sys/syscall.h>
 #include <unistd.h>
 #endif
 
+#if defined(__linux__) && (defined(__riscv) && (__riscv_xlen == 64))
+#include <sys/cachectl.h>
+#include <sys/syscall.h>
+#include <unistd.h>
+#endif
+
 // The compiler generates calls to __clear_cache() when creating
 // trampoline functions on the stack for use with nested functions.
 // It is expected to invalidate the instruction cache for the
 // specified range.
 
 void __clear_cache(void *start, void *end) {
 #if __i386__ || __x86_64__ || defined(_M_IX86) || defined(_M_X64)
 // Intel processors have a unified instruction and data cache
#define __ARM_NR_cacheflush 0x0f0002
   const register int syscall_nr __asm("r7") = __ARM_NR_cacheflush;
   __asm __volatile("svc 0x0"
                    : "=r"(start_reg)
                    : "r"(syscall_nr), "r"(start_reg), "r"(end_reg), "r"(flags));
   assert(start_reg == 0 && "Cache flush syscall failed.");
 #else
   compilerrt_abort();
 #endif
+#elif defined(__linux__) && (defined(__riscv) && (__riscv_xlen == 64))
+  // The only available flag is SYS_RISCV_FLUSH_ICACHE_LOCAL
+  // see linux/arch/riscv/include/asm/cacheflush.h
+  __riscv_flush_icache(start, end, 0);
 #elif defined(__linux__) && defined(__mips__)
   const uintptr_t start_int = (uintptr_t)start;
   const uintptr_t end_int = (uintptr_t)end;
   syscall(__NR_cacheflush, start, (end_int - start_int), BCACHE);
 #elif defined(__mips__) && defined(__OpenBSD__)
   cacheflush(start, (uintptr_t)end - (uintptr_t)start, BCACHE);
 #elif defined(__aarch64__) && !defined(__APPLE__)
   uint64_t xstart = (uint64_t)(uintptr_t)start;

compiler-rt/lib/crt/crtbegin.c

 
 #ifdef CRT_HAS_INITFINI_ARRAY
 __attribute__((section(".init_array"),
                used)) static void (*__init)(void) = __do_init;
 #elif defined(__i386__) || defined(__x86_64__)
 __asm__(".pushsection .init,\"ax\",@progbits\n\t"
     "call " __USER_LABEL_PREFIX__ "__do_init\n\t"
     ".popsection");
+#elif defined(__riscv)
+__asm__(".pushsection .init,\"ax\",%progbits\n\t"
+    "call " __USER_LABEL_PREFIX__ "__do_init\n\t"
+    ".popsection");
 #elif defined(__arm__) || defined(__aarch64__)
 __asm__(".pushsection .init,\"ax\",%progbits\n\t"
     "bl " __USER_LABEL_PREFIX__ "__do_init\n\t"
     ".popsection");
 #elif defined(__powerpc__) || defined(__powerpc64__)
 __asm__(".pushsection .init,\"ax\",@progbits\n\t"
     "bl " __USER_LABEL_PREFIX__ "__do_init\n\t"
     "nop\n\t"

 __asm__(".pushsection .fini,\"ax\",%progbits\n\t"
     "bl " __USER_LABEL_PREFIX__ "__do_fini\n\t"
     ".popsection");
 #elif defined(__powerpc__) || defined(__powerpc64__)
 __asm__(".pushsection .fini,\"ax\",@progbits\n\t"
     "bl " __USER_LABEL_PREFIX__ "__do_fini\n\t"
     "nop\n\t"
     ".popsection");
+#elif defined(__riscv)
+__asm__(".pushsection .fini,\"ax\",@progbits\n\t"
+    "call " __USER_LABEL_PREFIX__ "__do_fini\n\t"
+    "nop\n\t"
+    ".popsection");
 #elif defined(__sparc__)
 __asm__(".pushsection .fini,\"ax\",@progbits\n\t"
     "call " __USER_LABEL_PREFIX__ "__do_fini\n\t"
     ".popsection");
 #else
 #error "crtbegin without .init_fini array unimplemented for this architecture"
 #endif  // CRT_HAS_INIT_FINI_ARRAY

compiler-rt/lib/hwasan/hwasan_interceptors_vfork.S

 #include "sanitizer_common/sanitizer_asm.h"
 
 #if defined(__linux__) && HWASAN_WITH_INTERCEPTORS
 #define COMMON_INTERCEPTOR_SPILL_AREA __hwasan_extra_spill_area
 #define COMMON_INTERCEPTOR_HANDLE_VFORK __hwasan_handle_vfork
+#include "sanitizer_common/sanitizer_common_interceptors_vfork_riscv64.inc.S"
 #include "sanitizer_common/sanitizer_common_interceptors_vfork_aarch64.inc.S"
 #include "sanitizer_common/sanitizer_common_interceptors_vfork_x86_64.inc.S"
 #endif
 
 NO_EXEC_STACK_DIRECTIVE

compiler-rt/lib/sanitizer_common/CMakeLists.txt

set(SANITIZER_IMPL_HEADERS
   sanitizer_symbolizer_internal.h
   sanitizer_symbolizer_libbacktrace.h
   sanitizer_symbolizer_mac.h
   sanitizer_symbolizer_rtems.h
   sanitizer_syscall_generic.inc
   sanitizer_syscall_linux_aarch64.inc
   sanitizer_syscall_linux_arm.inc
   sanitizer_syscall_linux_x86_64.inc
+  sanitizer_syscall_linux_riscv64.inc
   sanitizer_syscalls_netbsd.inc
   sanitizer_thread_registry.h
   sanitizer_tls_get_addr.h
   sanitizer_vector.h
   sanitizer_win.h
   sanitizer_win_defs.h
   sanitizer_win_dll_thunk.h
   sanitizer_win_weak_interception.h

compiler-rt/lib/sanitizer_common/sanitizer_common.h

enum ModuleArch {
   kModuleArchUnknown,
   kModuleArchI386,
   kModuleArchX86_64,
   kModuleArchX86_64H,
   kModuleArchARMV6,
   kModuleArchARMV7,
   kModuleArchARMV7S,
   kModuleArchARMV7K,
-  kModuleArchARM64
+  kModuleArchARM64,
+  kModuleArchRISCV64
 };
 
 // Opens the file 'file_name" and reads up to 'max_len' bytes.
 // The resulting buffer is mmaped and stored in '*buff'.
 // Returns true if file was successfully opened and read.
 bool ReadFileToVector(const char *file_name,
                       InternalMmapVectorNoCtor<char> *buff,
                       uptr max_len = 1 << 26, error_t *errno_p = nullptr);
switch (arch) {
     case kModuleArchARMV7:
       return "armv7";
     case kModuleArchARMV7S:
       return "armv7s";
     case kModuleArchARMV7K:
       return "armv7k";
     case kModuleArchARM64:
       return "arm64";
+    case kModuleArchRISCV64:
+      return "riscv64";
   }
   CHECK(0 && "Invalid module arch");
   return "";
 }
 
 const uptr kModuleUUIDSize = 16;
 const uptr kMaxSegName = 16;
 

compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_vfork_riscv64.inc.S

+#if (defined(__riscv) && (__riscv_xlen == 64)) && defined(__linux__)
+
+#include "sanitizer_common/sanitizer_asm.h"
+
+ASM_HIDDEN(COMMON_INTERCEPTOR_SPILL_AREA)
+
+.comm _ZN14__interception10real_vforkE,8,8
+.globl ASM_WRAPPER_NAME(vfork)
+ASM_TYPE_FUNCTION(ASM_WRAPPER_NAME(vfork))
+ASM_WRAPPER_NAME(vfork):
+        // Save ra in the off-stack spill area.
+        // allocate space on stack
+        addi    sp, sp, -16
+        // store ra value 
+        sd      ra, 8(sp)
+        call    COMMON_INTERCEPTOR_SPILL_AREA
+        // restore previous values from stack
+        ld      ra, 8(sp)
+        // adjust stack
+        addi    sp, sp, 16
+        // store ra by x10??
+        sd      ra, 0(x10)
+
+        // Call real vfork. This may return twice. User code that runs between the first and the second return
+        // may clobber the stack frame of the interceptor; that's why it does not have a frame.
+        la x10, _ZN14__interception10real_vforkE
+        ld x10, 0(x10)
+        jalr x10
+
+        // adjust stack
+        addi    sp, sp, -16
+        // store x10 by adjusted stack
+        sd      x10, 8(sp)
+        // jump to exit label if x10 is 0
+        beqz    x10, .L_exit
+
+        // x0 != 0 => parent process. Clear stack shadow.
+        // put old sp to x10
+        addi   x10, sp, 16
+        call   COMMON_INTERCEPTOR_HANDLE_VFORK
+
+.L_exit:
+        // Restore ra
+        call   COMMON_INTERCEPTOR_SPILL_AREA
+        ld     ra, 0(x10)
+        // load value by stack
+        ld     x10, 8(sp)
+        // adjust stack
+        addi   sp, sp, 16
+        ret
+ASM_SIZE(vfork)
+
+.weak vfork
+.set vfork, ASM_WRAPPER_NAME(vfork)
+
+#endif

compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc

struct sanitizer_kernel_sockaddr {
   unsigned short sa_family;
   char sa_data[14];
 };
 
 // Real sigset size is always passed as a syscall argument.
 // Declare it "void" to catch sizeof(kernel_sigset_t).
 typedef void kernel_sigset_t;
 
 static void kernel_write_iovec(const __sanitizer_iovec *iovec,
                         SIZE_T iovlen, SIZE_T maxlen) {
   for (SIZE_T i = 0; i < iovlen && maxlen; ++i) {
     SSIZE_T sz = Min(iovec[i].iov_len, maxlen);
     POST_WRITE(iovec[i].iov_base, sz);
     maxlen -= sz;
   }
 }
 
 // This functions uses POST_READ, because it needs to run after syscall to know
 // the real read range.
 static void kernel_read_iovec(const __sanitizer_iovec *iovec,
                        SIZE_T iovlen, SIZE_T maxlen) {
   POST_READ(iovec, sizeof(*iovec) * iovlen);
   for (SIZE_T i = 0; i < iovlen && maxlen; ++i) {
     SSIZE_T sz = Min(iovec[i].iov_len, maxlen);
     POST_READ(iovec[i].iov_base, sz);
     maxlen -= sz;
   }
 }
 
 PRE_SYSCALL(recvmsg)(long sockfd, sanitizer_kernel_msghdr *msg, long flags) {
   PRE_READ(msg, sizeof(*msg));
 }
 
 POST_SYSCALL(recvmsg)(long res, long sockfd, sanitizer_kernel_msghdr *msg,
                       long flags) {
   if (res >= 0) {
     if (msg) {
       for (unsigned long i = 0; i < msg->msg_iovlen; ++i) {
         POST_WRITE(msg->msg_iov[i].iov_base, msg->msg_iov[i].iov_len);
       }
       POST_WRITE(msg->msg_control, msg->msg_controllen);
     }
   }
 }
 
 PRE_SYSCALL(recvmmsg)(long fd, sanitizer_kernel_mmsghdr *msg, long vlen,
                       long flags, void *timeout) {
   PRE_READ(msg, vlen * sizeof(*msg));
 }
 
 POST_SYSCALL(recvmmsg)(long res, long fd, sanitizer_kernel_mmsghdr *msg,
                        long vlen, long flags, void *timeout) {
   if (res >= 0) {
     if (msg) {
       for (unsigned long i = 0; i < msg->msg_hdr.msg_iovlen; ++i) {
         POST_WRITE(msg->msg_hdr.msg_iov[i].iov_base,
                    msg->msg_hdr.msg_iov[i].iov_len);
       }
       POST_WRITE(msg->msg_hdr.msg_control, msg->msg_hdr.msg_controllen);
       POST_WRITE(&msg->msg_len, sizeof(msg->msg_len));
     }
     if (timeout) POST_WRITE(timeout, struct_timespec_sz);
   }
 }
 
 PRE_SYSCALL(read)(long fd, void *buf, uptr count) {
   if (buf) {
     PRE_WRITE(buf, count);
   }
 }
 
 POST_SYSCALL(read)(long res, long fd, void *buf, uptr count) {
   if (res > 0 && buf) {
     POST_WRITE(buf, res);

 
 PRE_SYSCALL(ni_syscall)() {}
 
 POST_SYSCALL(ni_syscall)(long res) {}
 
 PRE_SYSCALL(ptrace)(long request, long pid, long addr, long data) {
 #if !SANITIZER_ANDROID && \
     (defined(__i386) || defined(__x86_64) || defined(__mips64) || \
-     defined(__powerpc64__) || defined(__aarch64__) || defined(__s390__))
+     defined(__powerpc64__) || defined(__aarch64__) || defined(__s390__) || \
+     (defined(__riscv) && (__riscv_xlen == 64)))
   if (data) {
     if (request == ptrace_setregs) {
       PRE_READ((void *)data, struct_user_regs_struct_sz);
     } else if (request == ptrace_setfpregs) {
       PRE_READ((void *)data, struct_user_fpregs_struct_sz);
     } else if (request == ptrace_setfpxregs) {
       PRE_READ((void *)data, struct_user_fpxregs_struct_sz);
     } else if (request == ptrace_setsiginfo) {
       PRE_READ((void *)data, siginfo_t_sz);
     } else if (request == ptrace_setregset) {
       __sanitizer_iovec *iov = (__sanitizer_iovec *)data;
       PRE_READ(iov->iov_base, iov->iov_len);
     }
   }
 #endif
 }
 
 POST_SYSCALL(ptrace)(long res, long request, long pid, long addr, long data) {
 #if !SANITIZER_ANDROID && \
     (defined(__i386) || defined(__x86_64) || defined(__mips64) || \
-     defined(__powerpc64__) || defined(__aarch64__) || defined(__s390__))
+     defined(__powerpc64__) || defined(__aarch64__) || defined(__s390__) || \
+     (defined(__riscv) && (__riscv_xlen == 64)))
   if (res >= 0 && data) {
     // Note that this is different from the interceptor in
     // sanitizer_common_interceptors.inc.
     // PEEK* requests return resulting values through data pointer.
     if (request == ptrace_getregs) {
       POST_WRITE((void *)data, struct_user_regs_struct_sz);
     } else if (request == ptrace_getfpregs) {
       POST_WRITE((void *)data, struct_user_fpregs_struct_sz);

compiler-rt/lib/sanitizer_common/sanitizer_linux.h

 // Linux-only syscalls.
 #if SANITIZER_LINUX
 uptr internal_prctl(int option, uptr arg2, uptr arg3, uptr arg4, uptr arg5);
 // Used only by sanitizer_stoptheworld. Signal handlers that are actually used
 // (like the process-wide error reporting SEGV handler) must use
 // internal_sigaction instead.
 int internal_sigaction_norestorer(int signum, const void *act, void *oldact);
 void internal_sigdelset(__sanitizer_sigset_t *set, int signum);
 #if defined(__x86_64__) || defined(__mips__) || defined(__aarch64__) \
   || defined(__powerpc64__) || defined(__s390__) || defined(__i386__) \
-  || defined(__arm__)
+  || defined(__arm__) || (defined(__riscv) && (__riscv_xlen == 64))
 uptr internal_clone(int (*fn)(void *), void *child_stack, int flags, void *arg,
                     int *parent_tidptr, void *newtls, int *child_tidptr);
 #endif
 int internal_uname(struct utsname *buf);
 #elif SANITIZER_FREEBSD
 void internal_sigdelset(__sanitizer_sigset_t *set, int signum);
 #elif SANITIZER_NETBSD
 void internal_sigdelset(__sanitizer_sigset_t *set, int signum);

compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp

 #   define SANITIZER_USE_GETENTROPY 0
 # endif
 #endif // SANITIZER_USE_GETENTROPY
 
 namespace __sanitizer {
 
 #if SANITIZER_LINUX && defined(__x86_64__)
 #include "sanitizer_syscall_linux_x86_64.inc"
+#elif SANITIZER_LINUX && (defined(__riscv) && (__riscv_xlen == 64))
+#include "sanitizer_syscall_linux_riscv64.inc"
 #elif SANITIZER_LINUX && defined(__aarch64__)
 #include "sanitizer_syscall_linux_aarch64.inc"
 #elif SANITIZER_LINUX && defined(__arm__)
 #include "sanitizer_syscall_linux_arm.inc"
 #else
 #include "sanitizer_syscall_generic.inc"
 #endif
 
struct linux_dirent {
   u64 d_ino;  // d_fileno
   u16 d_reclen;
   u16 d_namlen;  // not used
   u8 d_type;     // not used
   char d_name[NAME_MAX + 1];
 };
 #else
 struct linux_dirent {
-#if SANITIZER_X32 || defined(__aarch64__)
+#if SANITIZER_X32 || defined(__aarch64__) || (defined(__riscv) && (__riscv_xlen == 64))
   u64 d_ino;
   u64 d_off;
 #else
   unsigned long      d_ino;
   unsigned long      d_off;
 #endif
   unsigned short     d_reclen;
-#ifdef __aarch64__
+#if defined(__aarch64__) || (defined(__riscv) && (__riscv_xlen == 64))
   unsigned char      d_type;
 #endif
   char               d_name[256];
 };
 #endif
 
 #if !SANITIZER_SOLARIS && !SANITIZER_NETBSD
 // Syscall wrappers.
# if defined(__powerpc64__) || defined(__aarch64__)
   // On PowerPC64 we have two different address space layouts: 44- and 46-bit.
   // We somehow need to figure out which one we are using now and choose
   // one of 0x00000fffffffffffUL and 0x00003fffffffffffUL.
   // Note that with 'ulimit -s unlimited' the stack is moved away from the top
   // of the address space, so simply checking the stack address is not enough.
   // This should (does) work for both PowerPC64 Endian modes.
   // Similarly, aarch64 has multiple address space layouts: 39, 42 and 47-bit.
   return (1ULL << (MostSignificantSetBitIndex(GET_CURRENT_FRAME()) + 1)) - 1;
+# elif (defined(__riscv) && (__riscv_xlen == 64))
+  return (1ULL << 38) - 1;
 # elif defined(__mips64)
   return (1ULL << 40) - 1;  // 0x000000ffffffffffUL;
 # elif defined(__s390x__)
   return (1ULL << 53) - 1;  // 0x001fffffffffffffUL;
 #elif defined(__sparc__)
   return ~(uptr)0;
 # else
   return (1ULL << 47) - 1;  // 0x00007fffffffffffUL;
#endif
                          "r"(parent_tidptr),
                          "r"(a3),
                          "r"(a4),
                          "i"(__NR_clone),
                          "i"(__NR_exit)
                        : "memory", "$29" );
   return res;
 }
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+uptr internal_clone(int (*fn)(void *), void *child_stack, int flags, void *arg,
+                    int *parent_tidptr, void *newtls, int *child_tidptr) {
+  long long res;
+  if (!fn || !child_stack)
+    return -EINVAL;
+  CHECK_EQ(0, (uptr)child_stack % 16);
+  child_stack = (char *)child_stack - 2 * sizeof(unsigned long long);
+  ((unsigned long long *)child_stack)[0] = (uptr)fn;
+  ((unsigned long long *)child_stack)[1] = (uptr)arg;
+
+  register int (*__fn)(void *)  __asm__("a0") = fn;
+  register void *__stack __asm__("a1") = child_stack;
+  register int   __flags __asm__("a2") = flags;
+  register void *__arg   __asm__("a3") = arg;
+  register int  *__ptid  __asm__("a4") = parent_tidptr;
+  register void *__tls   __asm__("a5") = newtls;
+  register int  *__ctid  __asm__("a6") = child_tidptr;
+
+  __asm__ __volatile__(
+                       "mv a0,a2\n" /* flags  */
+                       "mv a2,a4\n" /* ptid  */
+                       "mv a3,a5\n" /* tls  */
+                       "mv a4,a6\n" /* ctid  */
+                       "addi a7, zero, %9\n" /* clone  */
+
+                       "ecall\n"
+
+                       /* if (%r0 != 0)
+                        *   return %r0;
+                        */
+                       "bnez a0, 1f\n"
+
+                       /* In the child, now. Call "fn(arg)". */
+                       "ld  a0,  8(sp)\n"
+                       "ld  a1, 16(sp)\n"
+                       "jalr a1\n"
+
+                       /* Call _exit(%r0).  */
+                       "addi  a7, zero, %10\n"
+                       "ecall\n"
+                     "1:\n"
+
+                       : "=r" (res)
+                       : "i"(-EINVAL),
+                         "r"(__fn), "r"(__stack), "r"(__flags), "r"(__arg),
+                         "r"(__ptid), "r"(__tls), "r"(__ctid),
+                         "i"(__NR_clone), "i"(__NR_exit)
+                       : "ra", "memory");
+  return res;
+}
 #elif defined(__aarch64__)
 uptr internal_clone(int (*fn)(void *), void *child_stack, int flags, void *arg,
                     int *parent_tidptr, void *newtls, int *child_tidptr) {
   long long res;
   if (!fn || !child_stack)
     return -EINVAL;
   CHECK_EQ(0, (uptr)child_stack % 16);
   child_stack = (char *)child_stack - 2 * sizeof(unsigned long long);
case 0x3b:  // pcrel
       }
 #endif
   }
   return SignalContext::UNKNOWN;
 #elif defined(__arm__)
   static const uptr FSR_WRITE = 1U << 11;
   uptr fsr = ucontext->uc_mcontext.error_code;
   return fsr & FSR_WRITE ? WRITE : READ;
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+  const auto *exception_source =
+      reinterpret_cast<const uint8_t *>(ucontext->uc_mcontext.__gregs[REG_PC]);
+  // check if instruction is 2 bytes long
+  bool isCompressed = ((exception_source[0] & 0x3) != 0x3);
+
+  if (!isCompressed) {
+    // FIXME: Add support for FPU, Atomic, etc
+    // opcode is located in lower 7 bits
+    uint8_t op_code = exception_source[0] & ((1 << 7) - 1);
+    // bits [12-14]
+    uint8_t funct3 = (exception_source[1] >> 4u) & 0b111u;
+
+    const uint8_t READ_OPCODE = 0b0000011u;   // loads
+    const uint8_t WRITE_OPCODE = 0b0100011u;  // stores
+
+    if (op_code == READ_OPCODE) {
+      switch (funct3) {
+        case 0b000:  // lb
+        case 0b001:  // lh
+        case 0b010:  // lw
+        case 0b100:  // lbu
+        case 0b101:  // lhu
+        case 0b110:  // lwu
+        case 0b011:  // ld
+          return READ;
+      }
+    }
+
+    if (op_code == WRITE_OPCODE) {
+      switch (funct3) {
+        case 0b000:  // sb
+        case 0b001:  // sh
+        case 0b010:  // sw
+        case 0b011:  // sd
+          return WRITE;
+      }
+    }
+
+    return UNKNOWN;
+  }
+  uint8_t insn_byte_lo = exception_source[0];
+  uint8_t insn_byte_hi = exception_source[1];
+  // reconstruct the actual short instruction
+  uint16_t faulty_instruction = (insn_byte_lo << 0) | (insn_byte_hi << 8);
+  uint8_t op_code = faulty_instruction & 0x3u;
+  uint8_t funct = faulty_instruction >> 13u;
+  // RCV quadrant 0 or 2
+  if (op_code == 0x0 || op_code == 0x2) {
+    switch (funct) {
+      case 0b001:  // c.fld / c.fldsp
+      case 0b010:  // c.lw / c.lwsp
+      case 0b011:  // c.ld / c.ldsp
+        return READ;
+      case 0b101:  // c.fsd / c.fsdsp
+      case 0b110:  // c.sw / c.swsp
+      case 0b111:  // c.sd / c.sdsp
+        return WRITE;
+    }
+    return UNKNOWN;
+  }
+  return UNKNOWN;
+
 #elif defined(__aarch64__)
   static const u64 ESR_ELx_WNR = 1U << 6;
   u64 esr;
   if (!Aarch64GetESR(ucontext, &esr)) return UNKNOWN;
   return esr & ESR_ELx_WNR ? WRITE : READ;
 #elif defined(__sparc__)
   // Decode the instruction to determine the access type.
   // From OpenSolaris $SRC/uts/sun4/os/trap.c (get_accesstype).

compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp

if (tls_align < kStackAlign)
     tls_align = kStackAlign;
   g_tls_size = RoundUpTo(tls_size, tls_align);
 }
 #else
 void InitTlsSize() { }
 #endif  // !SANITIZER_FREEBSD && !SANITIZER_ANDROID && !SANITIZER_GO &&
         // !SANITIZER_NETBSD && !SANITIZER_SOLARIS
 
 #if (defined(__x86_64__) || defined(__i386__) || defined(__mips__) ||          \
      defined(__aarch64__) || defined(__powerpc64__) || defined(__s390__) ||    \
-     defined(__arm__)) &&                                                      \
+     defined(__arm__) || (defined(__riscv) && (__riscv_xlen == 64))) &&        \
     SANITIZER_LINUX && !SANITIZER_ANDROID
 // sizeof(struct pthread) from glibc.
 static atomic_uintptr_t thread_descriptor_size;
 
 uptr ThreadDescriptorSize() {
   uptr val = atomic_load_relaxed(&thread_descriptor_size);
   if (val)
     return val;
if (GetLibcVersion(&major, &minor, &patch) && major == 2) {
     else if (minor <= 14)
       val = FIRST_32_SECOND_64(1168, 2304);
     else
       val = FIRST_32_SECOND_64(1216, 2304);
   }
 #elif defined(__mips__)
   // TODO(sagarthakur): add more values as per different glibc versions.
   val = FIRST_32_SECOND_64(1152, 1776);
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+  // The sizeof (struct pthread) is the same from GLIBC 2.17 to 2.22.
+  val = 1776;
 #elif defined(__aarch64__)
   // The sizeof (struct pthread) is the same from GLIBC 2.17 to 2.22.
   val = 1776;
 #elif defined(__powerpc64__)
   val = 1776; // from glibc.ppc64le 2.20-8.fc21
 #elif defined(__s390__)
   val = FIRST_32_SECOND_64(1152, 1776); // valid for glibc 2.22
 #endif
   if (val)
     atomic_store_relaxed(&thread_descriptor_size, val);
   return val;
 }
 
 // The offset at which pointer to self is located in the thread descriptor.
 const uptr kThreadSelfOffset = FIRST_32_SECOND_64(8, 16);
 
 uptr ThreadSelfOffset() {
   return kThreadSelfOffset;
 }
 
-#if defined(__mips__) || defined(__powerpc64__)
+#if defined(__mips__) || defined(__powerpc64__) || \
+  (defined(__riscv) && (__riscv_xlen == 64))
 // TlsPreTcbSize includes size of struct pthread_descr and size of tcb
 // head structure. It lies before the static tls blocks.
 static uptr TlsPreTcbSize() {
 # if defined(__mips__)
   const uptr kTcbHead = 16; // sizeof (tcbhead_t)
 # elif defined(__powerpc64__)
   const uptr kTcbHead = 88; // sizeof (tcbhead_t)
+# elif (defined(__riscv) && (__riscv_xlen == 64))
+  const uptr kTcbHead = 16; // sizeof (tcbhead_t)
 # endif
   const uptr kTlsAlign = 16;
   const uptr kTlsPreTcbSize =
       RoundUpTo(ThreadDescriptorSize() + kTcbHead, kTlsAlign);
   return kTlsPreTcbSize;
 }
 #endif
 
# elif defined(__mips__)
   asm volatile(".set push;\
                 .set mips64r2;\
                 rdhwr %0,$29;\
                 .set pop" : "=r" (thread_pointer));
   descr_addr = thread_pointer - kTlsTcbOffset - TlsPreTcbSize();
 # elif defined(__aarch64__) || defined(__arm__)
   descr_addr = reinterpret_cast<uptr>(__builtin_thread_pointer()) -
                                       ThreadDescriptorSize();
+# elif (defined(__riscv) && (__riscv_xlen == 64))
+
+  uptr tcb_end;
+  asm volatile("mv %0, tp;\n"
+               : "=r" (tcb_end));
+  // https://github.com/riscv/riscv-elf-psabi-doc/issues/53
+  const uptr kTlsTcbOffset = 0x800;
+  descr_addr = reinterpret_cast<uptr>(tcb_end - kTlsTcbOffset - TlsPreTcbSize());
+
 # elif defined(__s390__)
   descr_addr = reinterpret_cast<uptr>(__builtin_thread_pointer());
 # elif defined(__powerpc64__)
   // PPC64LE uses TLS variant I. The thread pointer (in GPR 13)
   // points to the end of the TCB + 0x7000. The pthread_descr structure is
   // immediately in front of the TCB. TlsPreTcbSize() includes the size of the
   // TCB and the size of pthread_descr.
   const uptr kTlsTcbOffset = 0x7000;

 #if !SANITIZER_GO
 static void GetTls(uptr *addr, uptr *size) {
 #if SANITIZER_LINUX && !SANITIZER_ANDROID
 # if defined(__x86_64__) || defined(__i386__) || defined(__s390__)
   *addr = ThreadSelf();
   *size = GetTlsSize();
   *addr -= *size;
   *addr += ThreadDescriptorSize();
 # elif defined(__mips__) || defined(__aarch64__) || defined(__powerpc64__) \
-    || defined(__arm__)
+    || defined(__arm__) || \
+    (defined(__riscv) && (__riscv_xlen == 64))
   *addr = ThreadSelf();
   *size = GetTlsSize();
 # else
   *addr = 0;
   *size = 0;
 # endif
 #elif SANITIZER_FREEBSD
   void** segbase = ThreadSelfSegbase();

 
 #if !SANITIZER_GO
 uptr GetTlsSize() {
 #if SANITIZER_FREEBSD || SANITIZER_ANDROID || SANITIZER_NETBSD ||              \
     SANITIZER_OPENBSD || SANITIZER_SOLARIS
   uptr addr, size;
   GetTls(&addr, &size);
   return size;
-#elif defined(__mips__) || defined(__powerpc64__)
+#elif defined(__mips__) || defined(__powerpc64__) || \
+    (defined(__riscv) && (__riscv_xlen == 64))
   return RoundUpTo(g_tls_size + TlsPreTcbSize(), 16);
 #else
   return g_tls_size;
 #endif
 }
 #endif
 
 void GetThreadStackAndTls(bool main, uptr *stk_addr, uptr *stk_size,

compiler-rt/lib/sanitizer_common/sanitizer_platform.h

 # endif
 #endif
 
 // The range of addresses which can be returned my mmap.
 // FIXME: this value should be different on different platforms.  Larger values
 // will still work but will consume more memory for TwoLevelByteMap.
 #if defined(__mips__)
 # define SANITIZER_MMAP_RANGE_SIZE FIRST_32_SECOND_64(1ULL << 32, 1ULL << 40)
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+#  define SANITIZER_MMAP_RANGE_SIZE FIRST_32_SECOND_64(1ULL << 32, 1ULL << 38)
 #elif defined(__aarch64__)
 # if SANITIZER_MAC
 // Darwin iOS/ARM64 has a 36-bit VMA, 64GiB VM
 #  define SANITIZER_MMAP_RANGE_SIZE FIRST_32_SECOND_64(1ULL << 32, 1ULL << 36)
 # else
 #  define SANITIZER_MMAP_RANGE_SIZE FIRST_32_SECOND_64(1ULL << 32, 1ULL << 48)
 # endif
 #elif defined(__sparc__)

compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h

 #define SANITIZER_INTERCEPT_SENDMMSG SI_LINUX
 #define SANITIZER_INTERCEPT_SYSMSG SI_LINUX_NOT_ANDROID
 #define SANITIZER_INTERCEPT_GETPEERNAME SI_POSIX
 #define SANITIZER_INTERCEPT_IOCTL SI_POSIX
 #define SANITIZER_INTERCEPT_INET_ATON SI_POSIX
 #define SANITIZER_INTERCEPT_SYSINFO SI_LINUX
 #define SANITIZER_INTERCEPT_READDIR SI_POSIX
 #define SANITIZER_INTERCEPT_READDIR64 SI_LINUX_NOT_ANDROID || SI_SOLARIS32
 #if SI_LINUX_NOT_ANDROID && \
   (defined(__i386) || defined(__x86_64) || defined(__mips64) || \
     defined(__powerpc64__) || defined(__aarch64__) || defined(__arm__) || \
-    defined(__s390__))
+    defined(__s390__) || (defined(__riscv) && (__riscv_xlen == 64)))
 #define SANITIZER_INTERCEPT_PTRACE 1
 #else
 #define SANITIZER_INTERCEPT_PTRACE 0
 #endif
 #define SANITIZER_INTERCEPT_SETLOCALE SI_POSIX
 #define SANITIZER_INTERCEPT_GETCWD SI_POSIX
 #define SANITIZER_INTERCEPT_GET_CURRENT_DIR_NAME SI_LINUX_NOT_ANDROID
 #define SANITIZER_INTERCEPT_STRTOIMAX SI_POSIX

compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h

 const unsigned struct_kernel_stat_sz = 144;
 const unsigned struct_kernel_stat64_sz = 0;
 #elif defined(__i386__)
 const unsigned struct_kernel_stat_sz = 64;
 const unsigned struct_kernel_stat64_sz = 96;
 #elif defined(__arm__)
 const unsigned struct_kernel_stat_sz = 64;
 const unsigned struct_kernel_stat64_sz = 104;
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+const unsigned struct_kernel_stat_sz = 128;
+const unsigned struct_kernel_stat64_sz = 104;
 #elif defined(__aarch64__)
 const unsigned struct_kernel_stat_sz = 128;
 const unsigned struct_kernel_stat64_sz = 104;
 #elif defined(__powerpc__) && !defined(__powerpc64__)
 const unsigned struct_kernel_stat_sz = 72;
 const unsigned struct_kernel_stat64_sz = 104;
 #elif defined(__powerpc64__)
 const unsigned struct_kernel_stat_sz = 144;

 #else
 typedef void __sanitizer_FILE;
 # define SANITIZER_HAS_STRUCT_FILE 0
 #endif
 
 #if SANITIZER_LINUX && !SANITIZER_ANDROID &&                               \
     (defined(__i386) || defined(__x86_64) || defined(__mips64) ||          \
      defined(__powerpc64__) || defined(__aarch64__) || defined(__arm__) || \
-     defined(__s390__))
+     defined(__s390__) || (defined(__riscv) && (__riscv_xlen == 64)))
 extern unsigned struct_user_regs_struct_sz;
 extern unsigned struct_user_fpregs_struct_sz;
 extern unsigned struct_user_fpxregs_struct_sz;
 extern unsigned struct_user_vfpregs_struct_sz;
 
 extern int ptrace_peektext;
 extern int ptrace_peekdata;
 extern int ptrace_peekuser;

compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp

 
 #if SANITIZER_IOS
 #undef IOC_DIRMASK
 #endif
 
 #if SANITIZER_LINUX
 # include <utime.h>
 # include <sys/ptrace.h>
-# if defined(__mips64) || defined(__aarch64__) || defined(__arm__)
+# if defined(__mips64) || defined(__aarch64__) || defined(__arm__) || \
+    (defined(__riscv) && (__riscv_xlen == 64))
 #  include <asm/ptrace.h>
 #  ifdef __arm__
 typedef struct user_fpregs elf_fpregset_t;
 #   define ARM_VFPREGS_SIZE_ASAN (32 * 8 /*fpregs*/ + 4 /*fpscr*/)
 #   if !defined(ARM_VFPREGS_SIZE)
 #     define ARM_VFPREGS_SIZE ARM_VFPREGS_SIZE_ASAN
 #   endif
 #  endif

 unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
 #endif
 
 #if SANITIZER_LINUX && !SANITIZER_ANDROID
   int glob_nomatch = GLOB_NOMATCH;
   int glob_altdirfunc = GLOB_ALTDIRFUNC;
 #endif
 
 #if SANITIZER_LINUX && !SANITIZER_ANDROID && \
     (defined(__i386) || defined(__x86_64) || defined(__mips64) || \
       defined(__powerpc64__) || defined(__aarch64__) || defined(__arm__) || \
-      defined(__s390__))
+      defined(__s390__) || (defined(__riscv) && (__riscv_xlen == 64)))
 #if defined(__mips64) || defined(__powerpc64__) || defined(__arm__)
   unsigned struct_user_regs_struct_sz = sizeof(struct pt_regs);
   unsigned struct_user_fpregs_struct_sz = sizeof(elf_fpregset_t);
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+  unsigned struct_user_regs_struct_sz = sizeof(struct user_regs_struct);
+  unsigned struct_user_fpregs_struct_sz = sizeof(struct __riscv_q_ext_state);
 #elif defined(__aarch64__)
   unsigned struct_user_regs_struct_sz = sizeof(struct user_pt_regs);
   unsigned struct_user_fpregs_struct_sz = sizeof(struct user_fpsimd_state);
 #elif defined(__s390__)
   unsigned struct_user_regs_struct_sz = sizeof(struct _user_regs_struct);
   unsigned struct_user_fpregs_struct_sz = sizeof(struct _user_fpregs_struct);
 #else
   unsigned struct_user_regs_struct_sz = sizeof(struct user_regs_struct);
   unsigned struct_user_fpregs_struct_sz = sizeof(struct user_fpregs_struct);
 #endif // __mips64 || __powerpc64__ || __aarch64__
 #if defined(__x86_64) || defined(__mips64) || defined(__powerpc64__) || \
-    defined(__aarch64__) || defined(__arm__) || defined(__s390__)
+    defined(__aarch64__) || defined(__arm__) || defined(__s390__) || \
+    (defined(__riscv) && (__riscv_xlen == 64))
   unsigned struct_user_fpxregs_struct_sz = 0;
 #else
   unsigned struct_user_fpxregs_struct_sz = sizeof(struct user_fpxregs_struct);
 #endif // __x86_64 || __mips64 || __powerpc64__ || __aarch64__ || __arm__
 // || __s390__
 #ifdef __arm__
   unsigned struct_user_vfpregs_struct_sz = ARM_VFPREGS_SIZE;
 #else

compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h

#if defined(__arm__)
   // so we return (pc-2) in that case in order to be safe.
   // For A32 mode we return (pc-4) because all instructions are 32 bit long.
   return (pc - 3) & (~1);
 #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__aarch64__)
   // PCs are always 4 byte aligned.
   return pc - 4;
 #elif defined(__sparc__) || defined(__mips__)
   return pc - 8;
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+  // RV-64 has variable instruciton length...
+  // C extentions gives us 2-byte instructoins
+  // RV-64 has 4-byte instructions
+  // + RISCV architecture allows instructions up to 8 bytes
+  // It seems difficult to figure out the exact instruction length -
+  // pc - 2 seems like a safe option for the purposes of stack tracing
+  return pc - 2;
 #else
   return pc - 1;
 #endif
 }
 
 // StackTrace that owns the buffer used to store the addresses.
 struct BufferedStackTrace : public StackTrace {
   uptr trace_buffer[kStackTraceMax];

compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp

 
 namespace __sanitizer {
 
 uptr StackTrace::GetNextInstructionPc(uptr pc) {
 #if defined(__sparc__) || defined(__mips__)
   return pc + 8;
 #elif defined(__powerpc__) || defined(__arm__) || defined(__aarch64__)
   return pc + 4;
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+  // we check for largest possible instruction first and then trying to unwind
+  // it if it is not
+  // Current check order is 8 -> 6 -> 4 -> 2
+  u8 InsnByte = *(u8 *)(pc);
+  if ((InsnByte & 0x7f) == 0x3f) {
+    // xxxxxxxxx0111111 | 64 bit |
+    return pc + 8;
+  }
+  if ((InsnByte & 0x3f) == 0x1f) {
+    // xxxxxxxxxx011111 | 48 bit |
+    return pc + 6;
+  }
+  if (((InsnByte & 0x3) == 0x3) && ((InsnByte & 0x1c) != 0x1c)) {
+    // xxxxxxxxxxxbbb11 | 32 bit | bbb != 111
+    return pc + 4;
+  }
+  if ((InsnByte & 0x3) != 0x3) {
+    // xxxxxxxxxxxxxxaa | 16 bit | aa != 11
+    return pc + 2;
+  }
+  // in case could not determine instruction width, return 0
+  return 0;
 #else
   return pc + 1;
 #endif
 }
 
 uptr StackTrace::GetCurrentPc() {
   return GET_CALLER_PC();
 }
#ifdef __powerpc__
     // back chain to find the caller frame before extracting it.
     uhwptr *caller_frame = (uhwptr*)frame[0];
     if (!IsValidFrame((uptr)caller_frame, stack_top, bottom) ||
         !IsAligned((uptr)caller_frame, sizeof(uhwptr)))
       break;
     uhwptr pc1 = caller_frame[2];
 #elif defined(__s390__)
     uhwptr pc1 = frame[14];
+#elif defined(__riscv)
+    uhwptr pc1 = frame[-1];
 #else
     uhwptr pc1 = frame[1];
 #endif
     // Let's assume that any pointer in the 0th page (i.e. <0x1000 on i386 and
     // x86_64) is invalid and stop unwinding here.  If we're adding support for
     // a platform where this isn't true, we need to reconsider this check.
     if (pc1 < kPageSize)
       break;

compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp

 //===-- sanitizer_stoptheworld_linux_libcdep.cpp --------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // See sanitizer_stoptheworld.h for details.
 // This implementation was inspired by Markus Gutschke's linuxthreads.cc.
 //
 //===----------------------------------------------------------------------===//
 
 #include "sanitizer_platform.h"
 
 #if SANITIZER_LINUX && (defined(__x86_64__) || defined(__mips__) || \
                         defined(__aarch64__) || defined(__powerpc64__) || \
                         defined(__s390__) || defined(__i386__) || \
-                        defined(__arm__))
+                        defined(__arm__) || \
+                        (defined(__riscv) && (__riscv_xlen == 64)))
 
 #include "sanitizer_stoptheworld.h"
 
 #include "sanitizer_platform_limits_posix.h"
 #include "sanitizer_atomic.h"
 
 #include <errno.h>
 #include <sched.h> // for CLONE_* definitions
 #include <stddef.h>
 #include <sys/prctl.h> // for PR_* definitions
 #include <sys/ptrace.h> // for PTRACE_* definitions
 #include <sys/types.h> // for pid_t
 #include <sys/uio.h> // for iovec
 #include <elf.h> // for NT_PRSTATUS
-#if defined(__aarch64__) && !SANITIZER_ANDROID
+#if (defined(__aarch64__) || (defined(__riscv) && (__riscv_xlen == 64))) && !SANITIZER_ANDROID
 // GLIBC 2.20+ sys/user does not include asm/ptrace.h
 # include <asm/ptrace.h>
 #endif
 #include <sys/user.h>  // for user_regs_struct
 #if SANITIZER_ANDROID && SANITIZER_MIPS
 # include <asm/reg.h>  // for mips SP register in sys/user.h
 #endif
 #include <sys/wait.h> // for signal-related stuff

 #  define REG_SP regs[EF_REG29]
 # endif
 
 #elif defined(__aarch64__)
 typedef struct user_pt_regs regs_struct;
 #define REG_SP sp
 #define ARCH_IOVEC_FOR_GETREGSET
 
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+typedef struct user_regs_struct regs_struct;
+#define REG_SP sp
+#define ARCH_IOVEC_FOR_GETREGSET
+
 #elif defined(__s390__)
 typedef _user_regs_struct regs_struct;
 #define REG_SP gprs[15]
 #define ARCH_IOVEC_FOR_GETREGSET
 
 #else
 #error "Unsupported architecture"
 #endif // SANITIZER_ANDROID && defined(__arm__)

compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp

private:
   void GetArgV(const char *path_to_binary,
                const char *(&argv)[kArgVMax]) const override {
 #if defined(__x86_64h__)
     const char* const kSymbolizerArch = "--default-arch=x86_64h";
 #elif defined(__x86_64__)
     const char* const kSymbolizerArch = "--default-arch=x86_64";
 #elif defined(__i386__)
     const char* const kSymbolizerArch = "--default-arch=i386";
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+    const char* const kSymbolizerArch = "--default-arch=riscv64";
 #elif defined(__aarch64__)
     const char* const kSymbolizerArch = "--default-arch=arm64";
 #elif defined(__arm__)
     const char* const kSymbolizerArch = "--default-arch=arm";
 #elif defined(__powerpc64__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
     const char* const kSymbolizerArch = "--default-arch=powerpc64";
 #elif defined(__powerpc64__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
     const char* const kSymbolizerArch = "--default-arch=powerpc64le";

compiler-rt/lib/sanitizer_common/sanitizer_syscall_linux_riscv64.inc

+//===-- sanitizer_syscall_linux_aarch64.inc --------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Implementations of internal_syscall and internal_iserror for Linux/riscv64.
+//
+//===----------------------------------------------------------------------===//
+
+// About local register variables:
+// https://gcc.gnu.org/onlinedocs/gcc/Local-Register-Variables.html#Local-Register-Variables
+//
+// Kernel ABI...
+// To my surprise I haven't found much information regarding it.
+// Kernel source and internet browsing shows that:
+//  syscall number is passed in a7 (http://man7.org/linux/man-pages/man2/syscall.2.html)
+//  results are return in a0 and a1 (http://man7.org/linux/man-pages/man2/syscall.2.html)
+//  arguments are passed in: a0-a7 (see below)
+//
+//  Regarding the arguments. The only "documentation" I could find is
+//  this comment (!!!) by Bruce Hold on google forums (!!!):
+//    https://groups.google.com/a/groups.riscv.org/forum/#!topic/sw-dev/exbrzM3GZDQ 
+//    Confirmed by inspecting glibc sources.
+//  Great way to document things.
+#define SYSCALL(name) __NR_ ## name
+
+#define INTERNAL_SYSCALL_CLOBBERS "memory"
+
+static uptr __internal_syscall(u64 nr) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0");
+  __asm__ volatile (
+      "ecall\n\t"
+      : "=r" (a0)
+      : "r" (a7)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall0(n) \
+  (__internal_syscall)(n)
+
+static uptr __internal_syscall(u64 nr, u64 arg1) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall1(n, a1) \
+  (__internal_syscall)(n, (u64)(a1))
+
+static uptr __internal_syscall(u64 nr, u64 arg1, long arg2) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  register long int a1 asm ("a1") = arg2;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7), "r" (a1)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall2(n, a1, a2) \
+  (__internal_syscall)(n, (u64)(a1), (long)(a2))
+
+static uptr __internal_syscall(u64 nr, u64 arg1, long arg2, long arg3) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  register long int a1 asm ("a1") = arg2;
+  register long int a2 asm ("a2") = arg3;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7), "r" (a1), "r" (a2)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall3(n, a1, a2, a3) \
+  (__internal_syscall)(n, (u64)(a1), (long)(a2), (long)(a3))
+
+static uptr __internal_syscall(u64 nr, u64 arg1, long arg2, long arg3,
+                               u64 arg4) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  register long int a1 asm ("a1") = arg2;
+  register long int a2 asm ("a2") = arg3;
+  register long int a3 asm ("a3") = arg4;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7), "r" (a1), "r" (a2), "r" (a3)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall4(n, a1, a2, a3, a4) \
+  (__internal_syscall)(n, (u64)(a1), (long)(a2), (long)(a3), (long)(a4))
+
+static uptr __internal_syscall(u64 nr, u64 arg1, long arg2, long arg3,
+                               u64 arg4, long arg5) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  register long int a1 asm ("a1") = arg2;
+  register long int a2 asm ("a2") = arg3;
+  register long int a3 asm ("a3") = arg4;
+  register long int a4 asm ("a4") = arg5;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7), "r" (a1), "r" (a2), "r" (a3), "r" (a4)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall5(n, a1, a2, a3, a4, a5) \
+  (__internal_syscall)(n, (u64)(a1), (long)(a2), (long)(a3), (long)(a4), \
+                       (u64)(a5))
+
+static uptr __internal_syscall(u64 nr, u64 arg1, long arg2, long arg3,
+                               u64 arg4, long arg5, long arg6) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  register long int a1 asm ("a1") = arg2;
+  register long int a2 asm ("a2") = arg3;
+  register long int a3 asm ("a3") = arg4;
+  register long int a4 asm ("a4") = arg5;
+  register long int a5 asm ("a5") = arg6;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7), "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall6(n, a1, a2, a3, a4, a5, a6) \
+  (__internal_syscall)(n, (u64)(a1), (long)(a2), (long)(a3), (long)(a4), \
+                       (u64)(a5), (long)(a6))
+
+static uptr __internal_syscall(u64 nr, u64 arg1, long arg2, long arg3,
+                               u64 arg4, long arg5, long arg6, long arg7) {
+  long int ecall_result = 0;
+  register long int a7 asm ("a7") = nr;
+  register long int a0 asm ("a0") = arg1;
+  register long int a1 asm ("a1") = arg2;
+  register long int a2 asm ("a2") = arg3;
+  register long int a3 asm ("a3") = arg4;
+  register long int a4 asm ("a4") = arg5;
+  register long int a5 asm ("a5") = arg6;
+  register long int a6 asm ("a6") = arg7;
+  __asm__ volatile (
+      "ecall\n\t"
+      : "+r" (a0)
+      : "r" (a7), "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6)
+      : INTERNAL_SYSCALL_CLOBBERS);
+  ecall_result = a0;
+  return ecall_result;
+}
+#define __internal_syscall7(n, a1, a2, a3, a4, a5, a6, a7) \
+  (__internal_syscall)(n, (u64)(a1), (long)(a2), (long)(a3), (long)(a4), \
+                       (u64)(a5), (long)(a6), (long)(a7))
+
+#define __SYSCALL_NARGS_X(a1, a2, a3, a4, a5, a6, a7, a8, n, ...) n
+#define __SYSCALL_NARGS(...) \
+  __SYSCALL_NARGS_X(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0, )
+#define __SYSCALL_CONCAT_X(a, b) a##b
+#define __SYSCALL_CONCAT(a, b) __SYSCALL_CONCAT_X(a, b)
+#define __SYSCALL_DISP(b, ...) \
+  __SYSCALL_CONCAT(b, __SYSCALL_NARGS(__VA_ARGS__))(__VA_ARGS__)
+
+#define internal_syscall(...) __SYSCALL_DISP(__internal_syscall, __VA_ARGS__)
+
+// Helper function used to avoid cobbler errno.
+bool internal_iserror(uptr retval, int *rverrno) {
+  if (retval >= (uptr)-4095) {
+    if (rverrno)
+      *rverrno = -retval;
+    return true;
+  }
+  return false;
+}

compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt

 include(CompilerRTCompile)
 
 clang_compiler_add_cxx_check()
 
 # FIXME: use SANITIZER_COMMON_SUPPORTED_ARCH here
-filter_available_targets(SANITIZER_UNITTEST_SUPPORTED_ARCH x86_64 i386 mips64 mips64el)
+filter_available_targets(SANITIZER_UNITTEST_SUPPORTED_ARCH x86_64 i386 mips64 mips64el riscv64)
 if(APPLE)
   darwin_filter_host_archs(SANITIZER_UNITTEST_SUPPORTED_ARCH SANITIZER_UNITTEST_SUPPORTED_ARCH)
 endif()
 
 set(SANITIZER_UNITTESTS
   sanitizer_allocator_test.cpp
   sanitizer_atomic_test.cpp
   sanitizer_bitvector_test.cpp

compiler-rt/test/asan/CMakeLists.txt

 set(ASAN_LIT_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
 
 set(ASAN_TESTSUITES)
 set(ASAN_DYNAMIC_TESTSUITES)
 
 # Before Windows 8 (CMAKE_SYSTEM_VERSION 6.2), reserving large regions of shadow
 # memory allocated physical memory for page tables, which made it very
 # unreliable. Remove the asan tests from check-all in this configuration.
 set(SHADOW_MAPPING_UNRELIABLE FALSE)
 if(OS_NAME MATCHES "Windows" AND CMAKE_SIZEOF_VOID_P EQUAL 8 AND
     CMAKE_SYSTEM_VERSION LESS 6.2)
   set(SHADOW_MAPPING_UNRELIABLE TRUE)
   message(WARNING "Disabling ASan tests because they are unreliable on Windows 7 and earlier")
 endif()
 
 macro(get_bits_for_arch arch bits)
-  if (${arch} MATCHES "x86_64|powerpc64|powerpc64le|aarch64|arm64|mips64|mips64el|s390x|sparcv9")
+  if (${arch} MATCHES "x86_64|powerpc64|powerpc64le|aarch64|arm64|mips64|mips64el|s390x|sparcv9|riscv64")
     set(${bits} 64)
   elseif (${arch} MATCHES "i386|arm|mips|mipsel|sparc")
     set(${bits} 32)
   else()
     message(FATAL_ERROR "Unknown target architecture: ${arch}")
   endif()
 endmacro()
 

compiler-rt/test/asan/TestCases/Linux/ptrace.cpp

 #define __PTRACE_FPREQUEST PTRACE_GETVFPREGS
 
 #elif defined(__s390__)
 typedef _user_regs_struct   regs_struct;
 typedef _user_fpregs_struct fpregs_struct;
 #define PRINT_REG_PC(__regs)    printf ("%lx\n", (unsigned long) (__regs.psw.addr))
 #define PRINT_REG_FP(__fpregs)  printf ("%lx\n", (unsigned long) (__fpregs.fpc))
 #define ARCH_IOVEC_FOR_GETREGSET
+
+#elif defined(__riscv) && (__riscv_xlen == 64)
+#include <asm/ptrace.h>
+typedef user_regs_struct regs_struct;
+typedef __riscv_q_ext_state fpregs_struct;
+#define PRINT_REG_PC(__regs) printf("%lx\n", (unsigned long)(__regs.pc))
+#define PRINT_REG_FP(__fpregs) printf("%lx\n", (unsigned long)(__fpregs.fcsr))
+#define ARCH_IOVEC_FOR_GETREGSET
 #endif
 
 
 int main(void) {
   pid_t pid;
   pid = fork();
   if (pid == 0) { // child
     ptrace(PTRACE_TRACEME, 0, NULL, NULL);

compiler-rt/test/asan/TestCases/Linux/vfork.cpp

 // https://github.com/google/sanitizers/issues/925
 // RUN: %clang_asan -O0 %s -o %t && %run %t 2>&1
 
-// REQUIRES: aarch64-target-arch || x86_64-target-arch || i386-target-arch || arm-target-arch
+// REQUIRES: aarch64-target-arch || x86_64-target-arch || i386-target-arch || arm-target-arch || riscv64-target-arch
 
 #include <assert.h>
 #include <sys/types.h>
 #include <sys/wait.h>
 #include <unistd.h>
 #include <stdio.h>
 #include <sanitizer/asan_interface.h>
 

llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp

 static const uint64_t kSmallX86_64ShadowOffsetBase = 0x7FFFFFFF;  // < 2G.
 static const uint64_t kSmallX86_64ShadowOffsetAlignMask = ~0xFFFULL;
 static const uint64_t kLinuxKasan_ShadowOffset64 = 0xdffffc0000000000;
 static const uint64_t kPPC64_ShadowOffset64 = 1ULL << 44;
 static const uint64_t kSystemZ_ShadowOffset64 = 1ULL << 52;
 static const uint64_t kMIPS32_ShadowOffset32 = 0x0aaa0000;
 static const uint64_t kMIPS64_ShadowOffset64 = 1ULL << 37;
 static const uint64_t kAArch64_ShadowOffset64 = 1ULL << 36;
+static const uint64_t kRiscv64_ShadowOffset64 = 0x20000000;
 static const uint64_t kFreeBSD_ShadowOffset32 = 1ULL << 30;
 static const uint64_t kFreeBSD_ShadowOffset64 = 1ULL << 46;
 static const uint64_t kNetBSD_ShadowOffset32 = 1ULL << 30;
 static const uint64_t kNetBSD_ShadowOffset64 = 1ULL << 46;
 static const uint64_t kNetBSDKasan_ShadowOffset64 = 0xdfff900000000000;
 static const uint64_t kPS4CPU_ShadowOffset64 = 1ULL << 40;
 static const uint64_t kWindowsShadowOffset32 = 3ULL << 28;
 static const uint64_t kEmscriptenShadowOffset = 0;
static ShadowMapping getShadowMapping(Triple &TargetTriple, int LongSize,
   bool IsPPC64 = TargetTriple.getArch() == Triple::ppc64 ||
                  TargetTriple.getArch() == Triple::ppc64le;
   bool IsSystemZ = TargetTriple.getArch() == Triple::systemz;
   bool IsX86_64 = TargetTriple.getArch() == Triple::x86_64;
   bool IsMIPS32 = TargetTriple.isMIPS32();
   bool IsMIPS64 = TargetTriple.isMIPS64();
   bool IsArmOrThumb = TargetTriple.isARM() || TargetTriple.isThumb();
   bool IsAArch64 = TargetTriple.getArch() == Triple::aarch64;
+  bool IsRISCV64 = TargetTriple.getArch() == Triple::riscv64;
   bool IsWindows = TargetTriple.isOSWindows();
   bool IsFuchsia = TargetTriple.isOSFuchsia();
   bool IsMyriad = TargetTriple.getVendor() == llvm::Triple::Myriad;
   bool IsEmscripten = TargetTriple.isOSEmscripten();
 
   ShadowMapping Mapping;
 
   Mapping.Scale = IsMyriad ? kMyriadShadowScale : kDefaultShadowScale;
if (LongSize == 32) {
     } else if (IsMIPS64)
       Mapping.Offset = kMIPS64_ShadowOffset64;
     else if (IsIOS)
       Mapping.Offset = kDynamicShadowSentinel;
     else if (IsMacOS && IsAArch64)
       Mapping.Offset = kDynamicShadowSentinel;
     else if (IsAArch64)
       Mapping.Offset = kAArch64_ShadowOffset64;
+    else if (IsRISCV64)
+      Mapping.Offset = kRiscv64_ShadowOffset64;
     else
       Mapping.Offset = kDefaultShadowOffset64;
   }
 
   if (ClForceDynamicShadow) {
     Mapping.Offset = kDynamicShadowSentinel;
   }
 
   if (ClMappingOffset.getNumOccurrences() > 0) {
     Mapping.Offset = ClMappingOffset;
   }
 
   // OR-ing shadow offset if more efficient (at least on x86) if the offset
   // is a power of two, but on ppc64 we have to use add since the shadow
   // offset is not necessary 1/8-th of the address space.  On SystemZ,
   // we could OR the constant in a single instruction, but it's more
   // efficient to load it once and use indexed addressing.
   Mapping.OrShadowOffset = !IsAArch64 && !IsPPC64 && !IsSystemZ && !IsPS4CPU &&
+                           !IsRISCV64 &&
                            !(Mapping.Offset & (Mapping.Offset - 1)) &&
                            Mapping.Offset != kDynamicShadowSentinel;
   bool IsAndroidWithIfuncSupport =
       IsAndroid && !TargetTriple.isAndroidVersionLT(21);
   Mapping.InGlobal = ClWithIfunc && IsAndroidWithIfuncSupport && IsArmOrThumb;
 
   return Mapping;
 }