[AIX] Implement AIX special bitfield related alignment rules

[Xiangling_L]

Summary

1.[bool, char, short] bitfields have the same alignment as unsigned int
2.Adjust alignment on typedef field decls/honor align attribute
3.Fix alignment for scoped enum class
4.Long long bitfield has 4bytes alignment and StorageUnitSize under 32 bit compile mode

[Xiangling_L]

Rebased on the pragma/pack patch;
Added packed related testcase for bitfield;

[jasonliu]

I think it would help the review if we could put the NFC portion(e.g. TypeSize -> StorageUnitSize) to a new patch, and give some rationale about the NFC change.

clang/lib/AST/RecordLayoutBuilder.cpp

624–625

[Xiangling_L]

In D87029#2285398, @jasonliu wrote:

I think it would help the review if we could put the NFC portion(e.g. TypeSize -> StorageUnitSize) to a new patch, and give some rationale about the NFC change.

Sure, will do.

[Xiangling_L]

Rebased on the NFC patch;

[sfertile]

clang/lib/Sema/SemaDecl.cpp

16447

Can this change can be split out into its own patch? If it can i would suggest doing so.

clang/test/Layout/aix-oversized-bitfield.cpp

2

Is it possible to run this test as both C and C++?

[sfertile]

clang/lib/AST/RecordLayoutBuilder.cpp

1670

I get different results for using a long long bitfield, and using an enum with an underlying long long type:

struct S {
    unsigned long long  field : 32;
};

extern "C" int printf(const char*, ...);

int main(void) {
    printf("%lu %lu\n", sizeof(struct S), alignof(struct S));
}

*** Dumping AST Record Layout
         0 | struct S
    0:0-31 |   unsigned long long field
           | [sizeof=4, dsize=4, align=4, preferredalign=4,
           |  nvsize=4, nvalign=4, preferrednvalign=4]

---

enum e : unsigned long long { E = 1 };

struct S {
    enum e field : 32;
};

extern "C" int printf(const char*, ...);

int main(void) {
    printf("%lu %lu\n", sizeof(struct S), alignof(struct S));
}

*** Dumping AST Record Layout
         0 | struct S
    0:0-31 |   enum e field
           | [sizeof=8, dsize=8, align=8, preferredalign=8,
           |  nvsize=8, nvalign=8, preferrednvalign=8]

Shouldn't we be truncating the size/align of the enum typed bitfield as well?

[sfertile]

clang/test/Layout/aix-bitfield-alignment.cpp

119

We should have a similar test for an overaligned long or long long.

[Xiangling_L]

clang/lib/Sema/SemaDecl.cpp

16447

I was expecting our buildbot can pick up all bitfield related changes at one time. Also if we split this out, that means we either need to wait for this second part to land first or need to add more LIT to oversized long long to the first part, which then needs to be removed whenever this second part land. It seems we are complicating the patch. Can you give me your rationale about why we want to split out this part?

[Xiangling_L]

• Fixed the bug of getting underlying type of enum;
• Fixed the bug to respect align attribute;
• Add more testcases;

[sfertile]

clang/lib/Sema/SemaDecl.cpp

16447

I was expecting our buildbot can pick up all bitfield related changes at one time.

IIUC clang/test/Layout/aix-oversized-bitfield.cpp works with just this change and isn't dependent on D87702. Its disjoint from the other changes in this patch, and packaging it into a commit with unrelated changes even if they are on the same theme is not beneficial. Its better to have those run through the build bot (or be bisectable) as distinct changes.

Also if we split this out, that means we either need to wait for this second part to land first or need to add more LIT to oversized long long to the first part, which then needs to be removed whenever this second part land. It seems we are complicating the patch.

I don't understand why it would need to wait or require extra testing to be added. Its a diagnostic and your lit test shows the error for 32-bit (where we want it emitted) and expected layout for 64-bit. The whole point of splitting it out is that its simple,does exactly one thing, is testable on its own, and we don't need the context of the other changes packaged with it to properly review it. I am asking to split it out because I see it as making this easier to review and commit.

[Xiangling_L]

clang/lib/Sema/SemaDecl.cpp

16447

Sure, I will split this patch into two as you suggested. By either need to wait for this second part to land first or need to add more LIT , I thought we would like to also add test coverage and later remove it for oversize bitfield. Since StorageUnitSize > 32 && Context.getTargetInfo().getTriple().isArch32Bit() does affect how oversize bitfield get laid out on AIX. But I guess it's more convenient to just split this patch as you suggested.

[Xiangling_L]

Remove emit errors for oversized long long bitfield and related testcase;

[sfertile]

clang/lib/AST/RecordLayoutBuilder.cpp

1659

When can BTy be null? Should this instead be an assert?

Instead can we implement this without looking at the underlying type of the bitfield?
Considering StorageUnitSize:

• for types smaller then unsigned we always increase the storage size to that of unsigned.
• for int, and long in 32-bit the storage size is already 32 and we don't adjust it.
• for long long in 32-bit we decrease the size to 32.
• For long long and long in 64-bit we leave the storage size as 64.

This could be implemented as

if (StorageUnitSize <  Context.getTypeSize(Context.UnsignedIntTy) || (StorageUnitSize > Context.getTypeSize(Context.UnsignedIntTy) &&  Context.getTargetInfo().getTriple().isArch32Bit()))
  StorageUnitSize =   Context.getTypeSize(Context.UnsignedIntTy);

Without relying on extracting the underlying type and having to worry about the case where BTy is null.
If we can also handle FieldAlign without knowing the underlying type then I think we should do so and avoid trying to extract the underlying type altogether.

1664

to unsigned --> to alignof(unsigned)

clang/test/Layout/aix-bitfield-alignment.cpp

2

I suggest we split the test cases which are C++ only into a sperate file, and run the cases that are valid in both C and C++ as both to ensure there are no differences between C and C++ layout fir bit fields.

[Xiangling_L]

Split testcases;
Simplified code;
Don't need to respect attribute align within typedef when the alignment value is less than bitcontainer size;

clang/test/Layout/aix-bitfield-alignment.cpp

2

Good idea. I split the testcase as you suggested. But since C and C++ layout dumping are slightly different in format, the CHECKs are adjusted accordingly to avoid making testcase too messy.

[Xiangling_L]

ping.

[Xiangling_L]

Rebased on the latest master and updated the testcase accordingly;

[sfertile]

LGTM.

clang/lib/AST/RecordLayoutBuilder.cpp

protected:
   unsigned IsMac68kAlign : 1;
 
   unsigned IsMsStruct : 1;
 
   /// UnfilledBitsInLastUnit - If the last field laid out was a bitfield,
   /// this contains the number of bits in the last unit that can be used for
   /// an adjacent bitfield if necessary.  The unit in question is usually
   /// a byte, but larger units are used if IsMsStruct.
   unsigned char UnfilledBitsInLastUnit;
-  /// LastBitfieldTypeSize - If IsMsStruct, represents the size of the type
-  /// of the previous field if it was a bitfield.
-  unsigned char LastBitfieldTypeSize;
+  /// LastBitfieldStorageUnitSize - If IsMsStruct, represents the size of the
+  /// storage unit of the previous field if it was a bitfield.
+  unsigned char LastBitfieldStorageUnitSize;
 
   /// MaxFieldAlignment - The maximum allowed field alignment. This is set by
   /// #pragma pack.
   CharUnits MaxFieldAlignment;
 
   /// DataSize - The data size of the record being laid out.
   uint64_t DataSize;
 
protected:
   ItaniumRecordLayoutBuilder(const ASTContext &Context,
                              EmptySubobjectMap *EmptySubobjects)
       : Context(Context), EmptySubobjects(EmptySubobjects), Size(0),
         Alignment(CharUnits::One()), PreferredAlignment(CharUnits::One()),
         UnpackedAlignment(CharUnits::One()),
         UnadjustedAlignment(CharUnits::One()), UseExternalLayout(false),
         InferAlignment(false), Packed(false), IsUnion(false),
         IsMac68kAlign(false), IsMsStruct(false), UnfilledBitsInLastUnit(0),
-        LastBitfieldTypeSize(0), MaxFieldAlignment(CharUnits::Zero()),
+        LastBitfieldStorageUnitSize(0), MaxFieldAlignment(CharUnits::Zero()),
         DataSize(0), NonVirtualSize(CharUnits::Zero()),
         NonVirtualAlignment(CharUnits::One()),
         PreferredNVAlignment(CharUnits::One()),
         PaddedFieldSize(CharUnits::Zero()), PrimaryBase(nullptr),
         PrimaryBaseIsVirtual(false), HasOwnVFPtr(false), HasPackedField(false),
         HandledFirstNonOverlappingEmptyField(false),
         FirstNearlyEmptyVBase(nullptr) {}
 
   void Layout(const RecordDecl *D);
   void Layout(const CXXRecordDecl *D);
   void Layout(const ObjCInterfaceDecl *D);
 
   void LayoutFields(const RecordDecl *D);
   void LayoutField(const FieldDecl *D, bool InsertExtraPadding);
-  void LayoutWideBitField(uint64_t FieldSize, uint64_t TypeSize,
+  void LayoutWideBitField(uint64_t FieldSize, uint64_t StorageUnitSize,
                           bool FieldPacked, const FieldDecl *D);
   void LayoutBitField(const FieldDecl *D);
 
   TargetCXXABI getCXXABI() const {
     return Context.getTargetInfo().getCXXABI();
   }
 
   /// BaseSubobjectInfoAllocator - Allocator for BaseSubobjectInfo objects.

 static uint64_t
 roundUpSizeToCharAlignment(uint64_t Size,
                            const ASTContext &Context) {
   uint64_t CharAlignment = Context.getTargetInfo().getCharAlign();
   return llvm::alignTo(Size, CharAlignment);
 }
 
 void ItaniumRecordLayoutBuilder::LayoutWideBitField(uint64_t FieldSize,
-                                                    uint64_t TypeSize,
+                                                    uint64_t StorageUnitSize,
                                                     bool FieldPacked,
                                                     const FieldDecl *D) {
   assert(Context.getLangOpts().CPlusPlus &&
          "Can only have wide bit-fields in C++!");
 
   // Itanium C++ ABI 2.4:
   //   If sizeof(T)*8 < n, let T' be the largest integral POD type with
   //   sizeof(T')*8 <= n.
for (const QualType &QT : IntegralPODTypes) {
     Type = QT;
   }
   assert(!Type.isNull() && "Did not find a type!");
 
   CharUnits TypeAlign = Context.getTypeAlignInChars(Type);
 
   // We're not going to use any of the unfilled bits in the last byte.
   UnfilledBitsInLastUnit = 0;
-  LastBitfieldTypeSize = 0;
+  LastBitfieldStorageUnitSize = 0;
 
   uint64_t FieldOffset;
   uint64_t UnpaddedFieldOffset = getDataSizeInBits() - UnfilledBitsInLastUnit;
 
   if (IsUnion) {
     uint64_t RoundedFieldSize = roundUpSizeToCharAlignment(FieldSize,
                                                            Context);
     setDataSize(std::max(getDataSizeInBits(), RoundedFieldSize));
void ItaniumRecordLayoutBuilder::LayoutWideBitField(uint64_t FieldSize,
 
   // Update the size.
   setSize(std::max(getSizeInBits(), getDataSizeInBits()));
 
   // Remember max struct/class alignment.
   UpdateAlignment(TypeAlign);
 }
 
+static bool isAIXLayout(const ASTContext &Context) {
+  return Context.getTargetInfo().getTriple().getOS() == llvm::Triple::AIX;
+}
+
 void ItaniumRecordLayoutBuilder::LayoutBitField(const FieldDecl *D) {
   bool FieldPacked = Packed || D->hasAttr<PackedAttr>();
   uint64_t FieldSize = D->getBitWidthValue(Context);
   TypeInfo FieldInfo = Context.getTypeInfo(D->getType());
-  uint64_t TypeSize = FieldInfo.Width;
+  uint64_t StorageUnitSize = FieldInfo.Width;
   unsigned FieldAlign = FieldInfo.Align;
 
   // UnfilledBitsInLastUnit is the difference between the end of the
   // last allocated bitfield (i.e. the first bit offset available for
   // bitfields) and the end of the current data size in bits (i.e. the
   // first bit offset available for non-bitfields).  The current data
   // size in bits is always a multiple of the char size; additionally,
   // for ms_struct records it's also a multiple of the
-  // LastBitfieldTypeSize (if set).
+  // LastBitfieldStorageUnitSize (if set).
 
   // The struct-layout algorithm is dictated by the platform ABI,
   // which in principle could use almost any rules it likes.  In
   // practice, UNIXy targets tend to inherit the algorithm described
   // in the System V generic ABI.  The basic bitfield layout rule in
   // System V is to place bitfields at the next available bit offset
   // where the entire bitfield would fit in an aligned storage unit of
   // the declared type; it's okay if an earlier or later non-bitfield
void ItaniumRecordLayoutBuilder::LayoutBitField(const FieldDecl *D) {
   // In an ms_struct struct, the alignment of a fundamental type is
   // always equal to its size.  This is necessary in order to mimic
   // the i386 alignment rules on targets which might not fully align
   // all types (e.g. Darwin PPC32, where alignof(long long) == 4).
 
   // First, some simple bookkeeping to perform for ms_struct structs.
   if (IsMsStruct) {
     // The field alignment for integer types is always the size.
-    FieldAlign = TypeSize;
+    FieldAlign = StorageUnitSize;
 
     // If the previous field was not a bitfield, or was a bitfield
     // with a different storage unit size, or if this field doesn't fit into
     // the current storage unit, we're done with that storage unit.
-    if (LastBitfieldTypeSize != TypeSize ||
+    if (LastBitfieldStorageUnitSize != StorageUnitSize ||
         UnfilledBitsInLastUnit < FieldSize) {
       // Also, ignore zero-length bitfields after non-bitfields.
-      if (!LastBitfieldTypeSize && !FieldSize)
+      if (!LastBitfieldStorageUnitSize && !FieldSize)
         FieldAlign = 1;
 
       UnfilledBitsInLastUnit = 0;
-      LastBitfieldTypeSize = 0;
+      LastBitfieldStorageUnitSize = 0;
+    }
+  }
+
+  // On AIX, [bool, char, short] bitfields have the same alignment
+  // as [unsigned].
+  if (isAIXLayout(Context)) {
+    const BuiltinType *BTy = nullptr;
+
+    // Get the underlying type from EnumDecl.
+    if (const EnumType *ET = dyn_cast<EnumType>(D->getType().getTypePtr())) {
+      const EnumDecl *ED = ET->getDecl();
+      if (const BuiltinType *BT =
+              dyn_cast<BuiltinType>(ED->getPromotionType().getTypePtr()))
+        BTy = BT;
+    } else {
+      BTy = Context.getBaseElementType(D->getType())->getAs<BuiltinType>();
+    }
+
+    if (BTy) {
+      BuiltinType::Kind BTyKind = BTy->getKind();
+      if (BTyKind != BuiltinType::ULong && BTyKind != BuiltinType::Long &&
+          BTyKind != BuiltinType::ULongLong &&
+          BTyKind != BuiltinType::LongLong) {
+        // Only set bitfields alignment to unsigned when it does
+        // not have attribute align specified or is less than
+        // unsigned alignment.
+        if (FieldAlign < Context.getTypeSize(Context.UnsignedIntTy))
+          FieldAlign = Context.getTypeSize(Context.UnsignedIntTy);
+        StorageUnitSize = Context.getTypeSize(Context.UnsignedIntTy);
+      } else {
+        // Handle AIX oversized Long Long bitfield under 32 bit compile mode.
+        if (StorageUnitSize > 32 &&
+            Context.getTargetInfo().getTriple().isArch32Bit()) {
+          StorageUnitSize = 32;
+          FieldAlign = 32;
+        }
+      }
     }
   }
 
   // If the field is wider than its declared type, it follows
-  // different rules in all cases.
-  if (FieldSize > TypeSize) {
-    LayoutWideBitField(FieldSize, TypeSize, FieldPacked, D);
+  // different rules in all cases, except on AIX.
+  // On AIX, wide bitfield follows the same rules as normal bitfield.
+  if (FieldSize > StorageUnitSize) {
+    LayoutWideBitField(FieldSize, StorageUnitSize, FieldPacked, D);
     return;
   }
 
   // Compute the next available bit offset.
   uint64_t FieldOffset =
     IsUnion ? 0 : (getDataSizeInBits() - UnfilledBitsInLastUnit);
 
   // Handle targets that don't honor bitfield type alignment.
   if (!IsMsStruct && !Context.getTargetInfo().useBitFieldTypeAlignment()) {
     // Some such targets do honor it on zero-width bitfields.
     if (FieldSize == 0 &&
         Context.getTargetInfo().useZeroLengthBitfieldAlignment()) {
       // The alignment to round up to is the max of the field's natural
       // alignment and a target-specific fixed value (sometimes zero).
       unsigned ZeroLengthBitfieldBoundary =
         Context.getTargetInfo().getZeroLengthBitfieldBoundary();
       FieldAlign = std::max(FieldAlign, ZeroLengthBitfieldBoundary);
 
     // If that doesn't apply, just ignore the field alignment.
     } else {
       FieldAlign = 1;
     }
   }
 
   // Remember the alignment we would have used if the field were not packed.
   unsigned UnpackedFieldAlign = FieldAlign;
 
   // Ignore the field alignment if the field is packed unless it has zero-size.
   if (!IsMsStruct && FieldPacked && FieldSize != 0)
     FieldAlign = 1;
 
void ItaniumRecordLayoutBuilder::LayoutBitField(const FieldDecl *D) {
 
   } else {
     // #pragma pack, with any value, suppresses the insertion of padding.
     bool AllowPadding = MaxFieldAlignment.isZero();
 
     // Compute the real offset.
     if (FieldSize == 0 ||
         (AllowPadding &&
-         (FieldOffset & (FieldAlign-1)) + FieldSize > TypeSize)) {
+         (FieldOffset & (FieldAlign - 1)) + FieldSize > StorageUnitSize)) {
       FieldOffset = llvm::alignTo(FieldOffset, FieldAlign);
     } else if (ExplicitFieldAlign &&
                (MaxFieldAlignmentInBits == 0 ||
                 ExplicitFieldAlign <= MaxFieldAlignmentInBits) &&
                Context.getTargetInfo().useExplicitBitFieldAlignment()) {
       // TODO: figure it out what needs to be done on targets that don't honor
       // bit-field type alignment like ARM APCS ABI.
       FieldOffset = llvm::alignTo(FieldOffset, ExplicitFieldAlign);
     }
 
     // Repeat the computation for diagnostic purposes.
     if (FieldSize == 0 ||
         (AllowPadding &&
-         (UnpackedFieldOffset & (UnpackedFieldAlign-1)) + FieldSize > TypeSize))
+         (UnpackedFieldOffset & (UnpackedFieldAlign - 1)) + FieldSize >
+             StorageUnitSize))
       UnpackedFieldOffset =
           llvm::alignTo(UnpackedFieldOffset, UnpackedFieldAlign);
     else if (ExplicitFieldAlign &&
              (MaxFieldAlignmentInBits == 0 ||
               ExplicitFieldAlign <= MaxFieldAlignmentInBits) &&
              Context.getTargetInfo().useExplicitBitFieldAlignment())
       UnpackedFieldOffset =
           llvm::alignTo(UnpackedFieldOffset, ExplicitFieldAlign);
void ItaniumRecordLayoutBuilder::LayoutBitField(const FieldDecl *D) {
   // Update DataSize to include the last byte containing (part of) the bitfield.
 
   // For unions, this is just a max operation, as usual.
   if (IsUnion) {
     // For ms_struct, allocate the entire storage unit --- unless this
     // is a zero-width bitfield, in which case just use a size of 1.
     uint64_t RoundedFieldSize;
     if (IsMsStruct) {
-      RoundedFieldSize =
-        (FieldSize ? TypeSize : Context.getTargetInfo().getCharWidth());
+      RoundedFieldSize = (FieldSize ? StorageUnitSize
+                                    : Context.getTargetInfo().getCharWidth());
 
       // Otherwise, allocate just the number of bytes required to store
       // the bitfield.
     } else {
       RoundedFieldSize = roundUpSizeToCharAlignment(FieldSize, Context);
     }
     setDataSize(std::max(getDataSizeInBits(), RoundedFieldSize));
 
   // For non-zero-width bitfields in ms_struct structs, allocate a new
   // storage unit if necessary.
   } else if (IsMsStruct && FieldSize) {
     // We should have cleared UnfilledBitsInLastUnit in every case
     // where we changed storage units.
     if (!UnfilledBitsInLastUnit) {
-      setDataSize(FieldOffset + TypeSize);
-      UnfilledBitsInLastUnit = TypeSize;
+      setDataSize(FieldOffset + StorageUnitSize);
+      UnfilledBitsInLastUnit = StorageUnitSize;
     }
     UnfilledBitsInLastUnit -= FieldSize;
-    LastBitfieldTypeSize = TypeSize;
+    LastBitfieldStorageUnitSize = StorageUnitSize;
 
     // Otherwise, bump the data size up to include the bitfield,
     // including padding up to char alignment, and then remember how
     // bits we didn't use.
   } else {
     uint64_t NewSizeInBits = FieldOffset + FieldSize;
     uint64_t CharAlignment = Context.getTargetInfo().getCharAlign();
     setDataSize(llvm::alignTo(NewSizeInBits, CharAlignment));
     UnfilledBitsInLastUnit = getDataSizeInBits() - NewSizeInBits;
 
     // The only time we can get here for an ms_struct is if this is a
     // zero-width bitfield, which doesn't count as anything for the
     // purposes of unfilled bits.
-    LastBitfieldTypeSize = 0;
+    LastBitfieldStorageUnitSize = 0;
   }
 
   // Update the size.
   setSize(std::max(getSizeInBits(), getDataSizeInBits()));
 
   // Remember max struct/class alignment.
   UnadjustedAlignment =
       std::max(UnadjustedAlignment, Context.toCharUnitsFromBits(FieldAlign));
void ItaniumRecordLayoutBuilder::LayoutField(const FieldDecl *D,
   if (D->isBitField()) {
     LayoutBitField(D);
     return;
   }
 
   uint64_t UnpaddedFieldOffset = getDataSizeInBits() - UnfilledBitsInLastUnit;
   // Reset the unfilled bits.
   UnfilledBitsInLastUnit = 0;
-  LastBitfieldTypeSize = 0;
+  LastBitfieldStorageUnitSize = 0;
 
   bool FieldPacked = Packed || D->hasAttr<PackedAttr>();
 
   bool AlignIsRequired = false;
   CharUnits FieldSize;
   CharUnits FieldAlign;
   // The amount of this class's dsize occupied by the field.
   // This is equal to FieldSize unless we're permitted to pack

clang/lib/Sema/SemaDecl.cpp

if (!FieldTy->isDependentType()) {
 
     // Over-wide bitfields are an error in C or when using the MSVC bitfield
     // ABI.
     bool CStdConstraintViolation =
         BitfieldIsOverwide && !getLangOpts().CPlusPlus;
     bool MSBitfieldViolation =
         Value.ugt(TypeStorageSize) &&
         (IsMsStruct || Context.getTargetInfo().getCXXABI().isMicrosoft());
-    if (CStdConstraintViolation || MSBitfieldViolation) {
+
+    bool AIXBitfieldViolation = false;
+    if (const BuiltinType *BTy = FieldTy.getTypePtr()->getAs<BuiltinType>()) {
+      if ((BTy->getKind() == BuiltinType::ULongLong ||
+           BTy->getKind() == BuiltinType::LongLong) &&
+          (unsigned)Value.getZExtValue() > 32 &&
+          Context.getTargetInfo().getTriple().isArch32Bit() &&
+          Context.getTargetInfo().getTriple().getOS() == llvm::Triple::AIX) {
+        AIXBitfieldViolation = true;
+        TypeStorageSize = 32;
+        TypeWidth = 32;
+      }
+    }
+
+    if (CStdConstraintViolation || MSBitfieldViolation ||
+        AIXBitfieldViolation) {
       unsigned DiagWidth =
           CStdConstraintViolation ? TypeWidth : TypeStorageSize;
       if (FieldName)
         return Diag(FieldLoc, diag::err_bitfield_width_exceeds_type_width)
                << FieldName << (unsigned)Value.getZExtValue()
                << !CStdConstraintViolation << DiagWidth;
 
       return Diag(FieldLoc, diag::err_anon_bitfield_width_exceeds_type_width)

clang/test/Layout/aix-bitfield-alignment.cpp

+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN:     -fsyntax-only  -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN:     -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:      *** Dumping AST Record Layout
+// CHECK-NEXT:          0 | struct A
+// CHECK-NEXT:      0:0-2 |   _Bool b
+// CHECK-NEXT:      0:3-4 |   unsigned char c
+// CHECK-NEXT:     0:5-10 |   unsigned short s
+// CHECK-NEXT:            | [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:            |  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:      *** Dumping AST Record Layout
+// CHECK-NEXT:          0 | struct B
+// CHECK-NEXT:          0 |   char c
+// CHECK-NEXT:        4:- |   int 
+// CHECK-NEXT:            | [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:            |  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:      *** Dumping AST Record Layout
+// CHECK-NEXT:          0 | struct C
+// CHECK-NEXT:      0:0-5 |   int a1
+// CHECK-NEXT:      0:6-9 |   signed char a2
+// CHECK-NEXT:      1:2-3 |   short a3
+// CHECK-NEXT:      1:4-5 |   int a4
+// CHECK-NEXT:     1:6-10 |   long a5
+// CHECK-NEXT:      2:3-8 |   long long a6
+// CHECK32:         4:0-7 |   unsigned long a7
+// CHECK32:               | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:               |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64:         3:1-8 |   unsigned long a7
+// CHECK64:               | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:               |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+typedef __attribute__((aligned(32))) short mySHORT;
+struct D {
+  char c : 8;
+  mySHORT : 0;
+};
+
+int d = sizeof(D);
+
+// CHECK:      *** Dumping AST Record Layout
+// CHECK-NEXT:          0 | struct D
+// CHECK-NEXT:      0:0-7 |   char c
+// CHECK-NEXT:       32:- |   mySHORT
+// CHECK-NEXT:            | [sizeof=32, dsize=32, align=32, preferredalign=32,
+// CHECK-NEXT:            |  nvsize=32, nvalign=32, preferrednvalign=32]
+
+enum class Bool : bool { False = 0,
+                         True = 1 };
+
+struct E {
+  Bool b : 1;
+};
+
+int e = sizeof(E);
+
+// CHECK:      *** Dumping AST Record Layout
+// CHECK-NEXT:          0 | struct E
+// CHECK-NEXT:      0:0-0 |   enum Bool b
+// CHECK-NEXT:            | [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:            |  nvsize=4, nvalign=4, preferrednvalign=4]

clang/test/Layout/aix-oversized-bitfield.cpp

+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN:     -fsyntax-only %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+struct A
+{
+    long long l : 64; // expected-error{{width of bit-field 'l' (64 bits) exceeds size of its type (32 bits)}}
+};
+
+int a = sizeof(A);
+
+// CHECK64:      *** Dumping AST Record Layout
+// CHECK64-NEXT:          0 | struct A
+// CHECK64-NEXT:     0:0-63 |   long long l
+// CHECK64-NEXT:            | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64-NEXT:            |  nvsize=8, nvalign=8, preferrednvalign=8]