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Differential D86738

AMDGPU/GlobalISel: Implement computeKnownBits for groupstaticsize
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Authored by arsenm on Aug 27 2020, 2:28 PM.

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hliao
rampitec
kerbowa

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arsenm created this revision.Aug 27 2020, 2:28 PM
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This revision is now accepted and ready to land.Aug 27 2020, 3:07 PM
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af1c1e20f47de56964bafb92638b607779fa6b54

uabelho added a subscriber: uabelho.Sep 2 2020, 2:42 AM
uabelho added inline comments.
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
81

With this change the following warnings pop up from gcc:

lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc:747:64: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
   if (Bits[AMDGPU::FeatureLocalMemorySize0] && LocalMemorySize < 0) LocalMemorySize = 0;
                                                ~~~~~~~~~~~~~~~~^~~

and

lib/Target/AMDGPU/R600GenSubtargetInfo.inc:280:62: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
   if (Bits[R600::FeatureLocalMemorySize0] && LocalMemorySize < 0) LocalMemorySize = 0;
                                              ~~~~~~~~~~~~~~~~^~~

The generated code looks like

if (Bits[AMDGPU::FeatureLocalMemorySize0] && LocalMemorySize < 0) LocalMemorySize = 0;

Any easy way to get rid of it?

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
4 lines
7 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
85 lines

Diff 288457

llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h

Show First 20 Lines • Show All 72 Lines • ▼ Show 20 Linesprotected:
bool HasVOP3PInsts; bool HasVOP3PInsts;
bool HasMulI24; bool HasMulI24;
bool HasMulU24; bool HasMulU24;
bool HasInv2PiInlineImm; bool HasInv2PiInlineImm;
bool HasFminFmaxLegacy; bool HasFminFmaxLegacy;
bool EnablePromoteAlloca; bool EnablePromoteAlloca;
bool HasTrigReducedRange; bool HasTrigReducedRange;
unsigned MaxWavesPerEU; unsigned MaxWavesPerEU;
int LocalMemorySize; unsigned LocalMemorySize;
uabelhoUnsubmitted
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With this change the following warnings pop up from gcc:

lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc:747:64: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
   if (Bits[AMDGPU::FeatureLocalMemorySize0] && LocalMemorySize < 0) LocalMemorySize = 0;
                                                ~~~~~~~~~~~~~~~~^~~

and

lib/Target/AMDGPU/R600GenSubtargetInfo.inc:280:62: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
   if (Bits[R600::FeatureLocalMemorySize0] && LocalMemorySize < 0) LocalMemorySize = 0;
                                              ~~~~~~~~~~~~~~~~^~~

The generated code looks like

if (Bits[AMDGPU::FeatureLocalMemorySize0] && LocalMemorySize < 0) LocalMemorySize = 0;

Any easy way to get rid of it?

uabelho: With this change the following warnings pop up from gcc: ```…
char WavefrontSizeLog2; char WavefrontSizeLog2;
public: public:
AMDGPUSubtarget(const Triple &TT); AMDGPUSubtarget(const Triple &TT);
static const AMDGPUSubtarget &get(const MachineFunction &MF); static const AMDGPUSubtarget &get(const MachineFunction &MF);
static const AMDGPUSubtarget &get(const TargetMachine &TM, static const AMDGPUSubtarget &get(const TargetMachine &TM,
const Function &F); const Function &F);
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Linespublic:
unsigned getWavefrontSize() const { unsigned getWavefrontSize() const {
return 1 << WavefrontSizeLog2; return 1 << WavefrontSizeLog2;
} }
unsigned getWavefrontSizeLog2() const { unsigned getWavefrontSizeLog2() const {
return WavefrontSizeLog2; return WavefrontSizeLog2;
} }
int getLocalMemorySize() const { unsigned getLocalMemorySize() const {
return LocalMemorySize; return LocalMemorySize;
} }
Align getAlignmentForImplicitArgPtr() const { Align getAlignmentForImplicitArgPtr() const {
return isAmdHsaOS() ? Align(8) : Align(4); return isAmdHsaOS() ? Align(8) : Align(4);
} }
/// Returns the offset in bytes from the start of the input buffer /// Returns the offset in bytes from the start of the input buffer
▲ Show 20 Lines • Show All 1,206 Lines • Show Last 20 Lines

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 11,419 Lines • ▼ Show 20 Lines case Intrinsic::amdgcn_workitem_id_z:
break; break;
case Intrinsic::amdgcn_mbcnt_lo: case Intrinsic::amdgcn_mbcnt_lo:
case Intrinsic::amdgcn_mbcnt_hi: { case Intrinsic::amdgcn_mbcnt_hi: {
// These return at most the wavefront size - 1. // These return at most the wavefront size - 1.
unsigned Size = MRI.getType(R).getSizeInBits(); unsigned Size = MRI.getType(R).getSizeInBits();
Known.Zero.setHighBits(Size - getSubtarget()->getWavefrontSizeLog2()); Known.Zero.setHighBits(Size - getSubtarget()->getWavefrontSizeLog2());
break; break;
} }
case Intrinsic::amdgcn_groupstaticsize: {
// We can report everything over the maximum size as 0. We can't report
// based on the actual size because we don't know if it's accurate or not
// at any given point.
Known.Zero.setHighBits(countLeadingZeros(getSubtarget()->getLocalMemorySize()));
break;
}
default: default:
break; break;
} }
} }
} }
} }
Align SITargetLowering::computeKnownAlignForTargetInstr( Align SITargetLowering::computeKnownAlignForTargetInstr(
▲ Show 20 Lines • Show All 325 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
--- ---
name: remove_and_255_zextload name: remove_and_255_zextload
legalized: true legalized: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
▲ Show 20 Lines • Show All 164 Lines • ▼ Show 20 Lines bb.0:
%load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load 1, addrspace 1, align 1) %load0:_(s32) = G_ZEXTLOAD %ptr0 :: (load 1, addrspace 1, align 1)
%load1:_(s32) = G_LOAD %ptr1 :: (load 4, addrspace 1, align 4) %load1:_(s32) = G_LOAD %ptr1 :: (load 4, addrspace 1, align 4)
%smin:_(s32) = G_SMIN %load0, %load1 %smin:_(s32) = G_SMIN %load0, %load1
%mask:_(s32) = G_CONSTANT i32 255 %mask:_(s32) = G_CONSTANT i32 255
%and:_(s32) = G_AND %smin, %mask %and:_(s32) = G_AND %smin, %mask
$vgpr0 = COPY %and $vgpr0 = COPY %and
... ...
# Test known bits for groupstaticsize is the maximum LDS size.
---
name: remove_and_65535_groupstaticsize
legalized: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: remove_and_65535_groupstaticsize
; CHECK: liveins: $vgpr0_vgpr1
; CHECK: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
; CHECK: %mask:_(s32) = G_CONSTANT i32 65535
; CHECK: %and:_(s32) = G_AND %lds_size, %mask
; CHECK: $vgpr0 = COPY %and(s32)
%ptr:_(p1) = COPY $vgpr0_vgpr1
%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
%mask:_(s32) = G_CONSTANT i32 65535
%and:_(s32) = G_AND %lds_size, %mask
$vgpr0 = COPY %and
...
---
name: remove_and_131071_groupstaticsize
legalized: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: remove_and_131071_groupstaticsize
; CHECK: liveins: $vgpr0_vgpr1
; CHECK: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
; CHECK: $vgpr0 = COPY %lds_size(s32)
%ptr:_(p1) = COPY $vgpr0_vgpr1
%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
%mask:_(s32) = G_CONSTANT i32 131071
%and:_(s32) = G_AND %lds_size, %mask
$vgpr0 = COPY %and
...
---
name: no_remove_and_65536_groupstaticsize
legalized: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: no_remove_and_65536_groupstaticsize
; CHECK: liveins: $vgpr0_vgpr1
; CHECK: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
; CHECK: %mask:_(s32) = G_CONSTANT i32 65536
; CHECK: %and:_(s32) = G_AND %lds_size, %mask
; CHECK: $vgpr0 = COPY %and(s32)
%ptr:_(p1) = COPY $vgpr0_vgpr1
%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
%mask:_(s32) = G_CONSTANT i32 65536
%and:_(s32) = G_AND %lds_size, %mask
$vgpr0 = COPY %and
...
---
name: no_remove_and_32767_groupstaticsize
legalized: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: no_remove_and_32767_groupstaticsize
; CHECK: liveins: $vgpr0_vgpr1
; CHECK: %lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
; CHECK: %mask:_(s32) = G_CONSTANT i32 32767
; CHECK: %and:_(s32) = G_AND %lds_size, %mask
; CHECK: $vgpr0 = COPY %and(s32)
%ptr:_(p1) = COPY $vgpr0_vgpr1
%lds_size:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
%mask:_(s32) = G_CONSTANT i32 32767
%and:_(s32) = G_AND %lds_size, %mask
$vgpr0 = COPY %and
...