[Fixed Point] Add codegen for conversion between fixed-point and floating point.

[ebevhan]

Summary

The patch adds the required methods to FixedPointBuilder
for converting between fixed-point and floating point,
and uses them from Clang.

This depends on D54749.

[leonardchan]

llvm/include/llvm/IR/FixedPointBuilder.h

182–183

Was there a reason for preferring multiplying by the reciprocal instead of dividing by a power of 2?

I think this was discussed before, but can't seem to remember/find the conversation.

[ebevhan]

llvm/include/llvm/IR/FixedPointBuilder.h

182–183

Multiplication should be more efficient than division with the same effect.

However, as @rjmccall mentioned in D54749, this rescaling might not work if the exponent is not large enough to fit the scaled value. This is unlikely for single precision float and larger formats, but it probably won't work for half precision.

I'm not entirely sure what to do about that. I was originally planning on adding an intrinsic that did pretty much the same thing as the one in that patch, but with a scaling factor. However, I figured that it would not be necessary when I noticed that an integer intrinsic was already in the works.

It feels odd to have intrinsics that do pretty much the same thing as another intrinsic but with an internal multiplication baked in. On top of that, it would require adding 4 new intrinsics (signed/unsigned, nonsaturating/saturating) which seems like a bit much.

Perhaps it may be necessary to emit something else when half precision is involved here...

[ebevhan]

Added promotion mechanism.

[ebevhan]

Rebased.

[ebevhan]

Updated method name.

[rjmccall]

llvm/include/llvm/IR/FixedPointBuilder.h

126

I like this method name. Does this have the same problem as I asked about in the other patch about really needing to be about whether the *unscaled* fixed-point type fits in the given type?

131

Could you just extract that code out of llvm::ConstantFP::get and put it on llvm::Type? Might be better as a separate patch.

While you're at it, there's also a TypeToFloatSemantics function in Constants.cpp that's completely redundant with llvm::Type::getFltSemantics.

[ebevhan]

Using Type::getFloatingPointTy now.

[ebevhan]

llvm/include/llvm/IR/FixedPointBuilder.h

126

It should be the same case here, yes. Both the integral range and the scale matter when determining this.

131

Done in D87512.

[ebevhan]

Fix typo.

[ebevhan]

Ping. Any further comments?

[leonardchan]

LGTM unless @rjmccall has further comments.

[rjmccall]

I had a question in the other patch about whether you should just have a method on FixedPointSemantics that returns the unscaled semantics (since FixedPointSemantics is totally capable of expressing integer types), which would let fitsInFloatSemantics have more obvious semantics. That would affect this as well. But otherwise I have no concerns.

[bjope]

I've just landed this on behalf of @ebevhan.

clang/lib/CodeGen/CGExprScalar.cpp

Value *ScalarExprEmitter::EmitScalarConversion(Value *Src, QualType SrcType,
   if (SrcType->isFixedPointType()) {
     if (DstType->isBooleanType())
       // It is important that we check this before checking if the dest type is
       // an integer because booleans are technically integer types.
       // We do not need to check the padding bit on unsigned types if unsigned
       // padding is enabled because overflow into this bit is undefined
       // behavior.
       return Builder.CreateIsNotNull(Src, "tobool");
-    if (DstType->isFixedPointType() || DstType->isIntegerType())
+    if (DstType->isFixedPointType() || DstType->isIntegerType() ||
+        DstType->isRealFloatingType())
       return EmitFixedPointConversion(Src, SrcType, DstType, Loc);
 
     llvm_unreachable(
         "Unhandled scalar conversion from a fixed point type to another type.");
   } else if (DstType->isFixedPointType()) {
-    if (SrcType->isIntegerType())
+    if (SrcType->isIntegerType() || SrcType->isRealFloatingType())
       // This also includes converting booleans and enums to fixed point types.
       return EmitFixedPointConversion(Src, SrcType, DstType, Loc);
 
     llvm_unreachable(
         "Unhandled scalar conversion to a fixed point type from another type.");
   }
 
   QualType NoncanonicalSrcType = SrcType;
EmitIntegerSignChangeCheck(Src, NoncanonicalSrcType, Res,
                                NoncanonicalDstType, Loc);
 
   return Res;
 }
 
 Value *ScalarExprEmitter::EmitFixedPointConversion(Value *Src, QualType SrcTy,
                                                    QualType DstTy,
                                                    SourceLocation Loc) {
-  auto SrcFPSema = CGF.getContext().getFixedPointSemantics(SrcTy);
-  auto DstFPSema = CGF.getContext().getFixedPointSemantics(DstTy);
   llvm::FixedPointBuilder<CGBuilderTy> FPBuilder(Builder);
   llvm::Value *Result;
+  if (SrcTy->isRealFloatingType())
+    Result = FPBuilder.CreateFloatingToFixed(Src,
+        CGF.getContext().getFixedPointSemantics(DstTy));
+  else if (DstTy->isRealFloatingType())
+    Result = FPBuilder.CreateFixedToFloating(Src,
+        CGF.getContext().getFixedPointSemantics(SrcTy),
+        ConvertType(DstTy));
+  else {
+    auto SrcFPSema = CGF.getContext().getFixedPointSemantics(SrcTy);
+    auto DstFPSema = CGF.getContext().getFixedPointSemantics(DstTy);
+
     if (DstTy->isIntegerType())
       Result = FPBuilder.CreateFixedToInteger(Src, SrcFPSema,
                                               DstFPSema.getWidth(),
                                               DstFPSema.isSigned());
     else if (SrcTy->isIntegerType())
       Result =  FPBuilder.CreateIntegerToFixed(Src, SrcFPSema.isSigned(),
                                                DstFPSema);
     else
       Result = FPBuilder.CreateFixedToFixed(Src, SrcFPSema, DstFPSema);
+  }
   return Result;
 }
 
 /// Emit a conversion from the specified complex type to the specified
 /// destination type, where the destination type is an LLVM scalar type.
 Value *ScalarExprEmitter::EmitComplexToScalarConversion(
     CodeGenFunction::ComplexPairTy Src, QualType SrcTy, QualType DstTy,
     SourceLocation Loc) {

clang/test/Frontend/fixed_point_compound.c

 _Sat _Accum sa;
 _Sat unsigned _Fract suf;
 _Sat unsigned long _Accum sula;
 
 int i;
 unsigned int u;
 signed char c;
 
+float fl;
+
 
 // CHECK-LABEL: @add_shfa(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
 // CHECK-NEXT:    [[TMP1:%.*]] = load i8, i8* @shf, align 1
 // CHECK-NEXT:    [[RESIZE:%.*]] = sext i8 [[TMP1]] to i32
 // CHECK-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[UPSCALE]], [[TMP0]]

 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[DOWNSCALE]] to i8
 // UNSIGNED-NEXT:    store i8 [[RESIZE1]], i8* @sshf, align 1
 // UNSIGNED-NEXT:    ret void
 //
 void add_sshsuf() {
   sshf += suf;
 }
 
+// CHECK-LABEL: @add_afl(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
+// CHECK-NEXT:    [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+// CHECK-NEXT:    [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000
+// CHECK-NEXT:    [[ADD:%.*]] = fadd float [[TMP3]], [[TMP0]]
+// CHECK-NEXT:    [[TMP4:%.*]] = fmul float [[ADD]], 3.276800e+04
+// CHECK-NEXT:    [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
+// CHECK-NEXT:    store i32 [[TMP5]], i32* @a, align 4
+// CHECK-NEXT:    ret void
+//
+void add_afl() {
+  a += fl;
+}
+
+// CHECK-LABEL: @add_fla(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @sa, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[ADD:%.*]] = fadd float [[TMP3]], [[TMP2]]
+// CHECK-NEXT:    store float [[ADD]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void add_fla() {
+  fl += sa;
+}
+
+// CHECK-LABEL: @add_safl(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @sa, align 4
+// CHECK-NEXT:    [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+// CHECK-NEXT:    [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000
+// CHECK-NEXT:    [[ADD:%.*]] = fadd float [[TMP3]], [[TMP0]]
+// CHECK-NEXT:    [[TMP4:%.*]] = fmul float [[ADD]], 3.276800e+04
+// CHECK-NEXT:    [[TMP5:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP4]])
+// CHECK-NEXT:    store i32 [[TMP5]], i32* @sa, align 4
+// CHECK-NEXT:    ret void
+//
+void add_safl() {
+  sa += fl;
+}
+
+// CHECK-LABEL: @add_flsa(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @sa, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[ADD:%.*]] = fadd float [[TMP3]], [[TMP2]]
+// CHECK-NEXT:    store float [[ADD]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void add_flsa() {
+  fl += sa;
+}
+
 // Subtraction, multiplication and division should work about the same, so
 // just make sure we can do them.
 
 // SIGNED-LABEL: @sub_auf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33

 // CHECK-NEXT:    [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8
 // CHECK-NEXT:    store i8 [[RESIZE3]], i8* @c, align 1
 // CHECK-NEXT:    ret void
 //
 void sub_csa() {
   c -= sa;
 }
 
+// CHECK-LABEL: @sub_afl(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
+// CHECK-NEXT:    [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+// CHECK-NEXT:    [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000
+// CHECK-NEXT:    [[SUB:%.*]] = fsub float [[TMP3]], [[TMP0]]
+// CHECK-NEXT:    [[TMP4:%.*]] = fmul float [[SUB]], 3.276800e+04
+// CHECK-NEXT:    [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
+// CHECK-NEXT:    store i32 [[TMP5]], i32* @a, align 4
+// CHECK-NEXT:    ret void
+//
+void sub_afl() {
+  a -= fl;
+}
+
 
 // SIGNED-LABEL: @mul_auf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1
 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33

 // CHECK-NEXT:    [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8
 // CHECK-NEXT:    store i8 [[RESIZE3]], i8* @c, align 1
 // CHECK-NEXT:    ret void
 //
 void mul_csa() {
   c *= sa;
 }
 
+// CHECK-LABEL: @mul_afl(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
+// CHECK-NEXT:    [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+// CHECK-NEXT:    [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000
+// CHECK-NEXT:    [[MUL:%.*]] = fmul float [[TMP3]], [[TMP0]]
+// CHECK-NEXT:    [[TMP4:%.*]] = fmul float [[MUL]], 3.276800e+04
+// CHECK-NEXT:    [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
+// CHECK-NEXT:    store i32 [[TMP5]], i32* @a, align 4
+// CHECK-NEXT:    ret void
+//
+void mul_afl() {
+  a *= fl;
+}
+
 
 // SIGNED-LABEL: @div_auf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1
 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33

 // CHECK-NEXT:    [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8
 // CHECK-NEXT:    store i8 [[RESIZE3]], i8* @c, align 1
 // CHECK-NEXT:    ret void
 //
 void div_csa() {
   c /= sa;
 }
 
+// CHECK-LABEL: @div_afl(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
+// CHECK-NEXT:    [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+// CHECK-NEXT:    [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000
+// CHECK-NEXT:    [[DIV:%.*]] = fdiv float [[TMP3]], [[TMP0]]
+// CHECK-NEXT:    [[TMP4:%.*]] = fmul float [[DIV]], 3.276800e+04
+// CHECK-NEXT:    [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
+// CHECK-NEXT:    store i32 [[TMP5]], i32* @a, align 4
+// CHECK-NEXT:    ret void
+//
+void div_afl() {
+  a /= fl;
+}
+
 
 // CHECK-LABEL: @shft_ai(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @i, align 4
 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP1]], [[TMP0]]
 // CHECK-NEXT:    store i32 [[TMP2]], i32* @a, align 4
 // CHECK-NEXT:    ret void

clang/test/Frontend/fixed_point_conversions.c

 
 _Sat unsigned short _Accum sat_usa;
 _Sat unsigned _Accum sat_ua;
 _Sat unsigned long _Accum sat_ula;
 
 _Sat short _Fract sat_sf;
 _Sat _Fract sat_f;
 _Sat long _Fract sat_lf;
+_Sat unsigned _Fract sat_uf;
 
 short s;
 int i;
 unsigned int ui;
 
+float fl;
+double d;
+
 // CHECK-LABEL: @fix_same1(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
 // CHECK-NEXT:    store i32 [[TMP0]], i32* @a2, align 4
 // CHECK-NEXT:    ret void
 //
 void fix_same1() {
   a2 = a;

 // UNSIGNED-NEXT:    [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]]
 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i39 [[SATMAX]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @sat_usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void int_sat4() {
   sat_usa = ui;
 }
+
+
+// CHECK-LABEL: @float_fix1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i16
+// CHECK-NEXT:    store i16 [[TMP2]], i16* @sa, align 2
+// CHECK-NEXT:    ret void
+//
+void float_fix1() {
+  sa = fl;
+}
+
+// CHECK-LABEL: @float_fix2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i32
+// CHECK-NEXT:    store i32 [[TMP2]], i32* @a, align 4
+// CHECK-NEXT:    ret void
+//
+void float_fix2() {
+  a = fl;
+}
+
+// CHECK-LABEL: @float_fix3(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i64
+// CHECK-NEXT:    store i64 [[TMP2]], i64* @la, align 8
+// CHECK-NEXT:    ret void
+//
+void float_fix3() {
+  la = fl;
+}
+
+// CHECK-LABEL: @float_fix4(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i8
+// CHECK-NEXT:    store i8 [[TMP2]], i8* @sf, align 1
+// CHECK-NEXT:    ret void
+//
+void float_fix4() {
+  sf = fl;
+}
+
+// CHECK-LABEL: @float_fix5(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i32
+// CHECK-NEXT:    store i32 [[TMP2]], i32* @lf, align 4
+// CHECK-NEXT:    ret void
+//
+void float_fix5() {
+  lf = fl;
+}
+
+// SIGNED-LABEL: @float_fix6(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// SIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04
+// SIGNED-NEXT:    [[TMP2:%.*]] = fptoui float [[TMP1]] to i32
+// SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua, align 4
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @float_fix6(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i32
+// UNSIGNED-NEXT:    store i32 [[TMP2]], i32* @ua, align 4
+// UNSIGNED-NEXT:    ret void
+//
+void float_fix6() {
+  ua = fl;
+}
+
+// SIGNED-LABEL: @float_fix7(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// SIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04
+// SIGNED-NEXT:    [[TMP2:%.*]] = fptoui float [[TMP1]] to i16
+// SIGNED-NEXT:    store i16 [[TMP2]], i16* @uf, align 2
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @float_fix7(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fptosi float [[TMP1]] to i16
+// UNSIGNED-NEXT:    store i16 [[TMP2]], i16* @uf, align 2
+// UNSIGNED-NEXT:    ret void
+//
+void float_fix7() {
+  uf = fl;
+}
+
+
+// CHECK-LABEL: @fix_float1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @sa, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i16 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 7.812500e-03
+// CHECK-NEXT:    store float [[TMP2]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void fix_float1() {
+  fl = sa;
+}
+
+// CHECK-LABEL: @fix_float2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000
+// CHECK-NEXT:    store float [[TMP2]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void fix_float2() {
+  fl = a;
+}
+
+// CHECK-LABEL: @fix_float3(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i64, i64* @la, align 8
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
+// CHECK-NEXT:    store float [[TMP2]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void fix_float3() {
+  fl = la;
+}
+
+// CHECK-LABEL: @fix_float4(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i8, i8* @sf, align 1
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i8 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 7.812500e-03
+// CHECK-NEXT:    store float [[TMP2]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void fix_float4() {
+  fl = sf;
+}
+
+// CHECK-LABEL: @fix_float5(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @lf, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
+// CHECK-NEXT:    store float [[TMP2]], float* @fl, align 4
+// CHECK-NEXT:    ret void
+//
+void fix_float5() {
+  fl = lf;
+}
+
+// SIGNED-LABEL: @fix_float6(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
+// SIGNED-NEXT:    [[TMP1:%.*]] = uitofp i32 [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3EF0000000000000
+// SIGNED-NEXT:    store float [[TMP2]], float* @fl, align 4
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @fix_float6(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = uitofp i32 [[TMP0]] to float
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000
+// UNSIGNED-NEXT:    store float [[TMP2]], float* @fl, align 4
+// UNSIGNED-NEXT:    ret void
+//
+void fix_float6() {
+  fl = ua;
+}
+
+// SIGNED-LABEL: @fix_float7(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
+// SIGNED-NEXT:    [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3EF0000000000000
+// SIGNED-NEXT:    store float [[TMP2]], float* @fl, align 4
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @fix_float7(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000
+// UNSIGNED-NEXT:    store float [[TMP2]], float* @fl, align 4
+// UNSIGNED-NEXT:    ret void
+//
+void fix_float7() {
+  fl = uf;
+}
+
+
+// CHECK-LABEL: @float_sat1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02
+// CHECK-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f32(float [[TMP1]])
+// CHECK-NEXT:    store i16 [[TMP2]], i16* @sat_sa, align 2
+// CHECK-NEXT:    ret void
+//
+void float_sat1() {
+  sat_sa = fl;
+}
+
+// CHECK-LABEL: @float_sat2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04
+// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP1]])
+// CHECK-NEXT:    store i32 [[TMP2]], i32* @sat_a, align 4
+// CHECK-NEXT:    ret void
+//
+void float_sat2() {
+  sat_a = fl;
+}
+
+// CHECK-LABEL: @float_sat3(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP1]])
+// CHECK-NEXT:    store i64 [[TMP2]], i64* @sat_la, align 8
+// CHECK-NEXT:    ret void
+//
+void float_sat3() {
+  sat_la = fl;
+}
+
+// CHECK-LABEL: @float_sat4(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02
+// CHECK-NEXT:    [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f32(float [[TMP1]])
+// CHECK-NEXT:    store i8 [[TMP2]], i8* @sat_sf, align 1
+// CHECK-NEXT:    ret void
+//
+void float_sat4() {
+  sat_sf = fl;
+}
+
+// SIGNED-LABEL: @float_sat5(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// SIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04
+// SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.fptoui.sat.i32.f32(float [[TMP1]])
+// SIGNED-NEXT:    store i32 [[TMP2]], i32* @sat_ua, align 4
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @float_sat5(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP1]])
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i32 0, i32 [[TMP2]]
+// UNSIGNED-NEXT:    store i32 [[SATMIN]], i32* @sat_ua, align 4
+// UNSIGNED-NEXT:    ret void
+//
+void float_sat5() {
+  sat_ua = fl;
+}
+
+// SIGNED-LABEL: @float_sat6(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// SIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04
+// SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP1]])
+// SIGNED-NEXT:    store i16 [[TMP2]], i16* @sat_uf, align 2
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @float_sat6(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load float, float* @fl, align 4
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f32(float [[TMP1]])
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]
+// UNSIGNED-NEXT:    store i16 [[SATMIN]], i16* @sat_uf, align 2
+// UNSIGNED-NEXT:    ret void
+//
+void float_sat6() {
+  sat_uf = fl;
+}

clang/test/Frontend/fixed_point_conversions_half.c

+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
+// RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED
+
+short _Fract sf;
+long _Fract lf;
+
+short _Accum sa;
+long _Accum la;
+
+unsigned short _Accum usa;
+unsigned long _Accum ula;
+
+_Sat short _Fract sf_sat;
+_Sat long _Fract lf_sat;
+
+_Sat short _Accum sa_sat;
+_Sat long _Accum la_sat;
+
+_Sat unsigned short _Accum usa_sat;
+_Sat unsigned long _Accum ula_sat;
+
+_Float16 h;
+
+
+// CHECK-LABEL: @half_fix1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi half [[TMP1]] to i8
+// CHECK-NEXT:    store i8 [[TMP2]], i8* @sf, align 1
+// CHECK-NEXT:    ret void
+//
+void half_fix1() {
+  sf = h;
+}
+
+// CHECK-LABEL: @half_fix2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = fptosi float [[TMP2]] to i32
+// CHECK-NEXT:    store i32 [[TMP3]], i32* @lf, align 4
+// CHECK-NEXT:    ret void
+//
+void half_fix2() {
+  lf = h;
+}
+
+// CHECK-LABEL: @half_fix3(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
+// CHECK-NEXT:    [[TMP2:%.*]] = fptosi half [[TMP1]] to i16
+// CHECK-NEXT:    store i16 [[TMP2]], i16* @sa, align 2
+// CHECK-NEXT:    ret void
+//
+void half_fix3() {
+  sa = h;
+}
+
+// CHECK-LABEL: @half_fix4(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = fptosi float [[TMP2]] to i64
+// CHECK-NEXT:    store i64 [[TMP3]], i64* @la, align 8
+// CHECK-NEXT:    ret void
+//
+void half_fix4() {
+  la = h;
+}
+
+// SIGNED-LABEL: @half_fix5(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02
+// SIGNED-NEXT:    [[TMP3:%.*]] = fptoui float [[TMP2]] to i16
+// SIGNED-NEXT:    store i16 [[TMP3]], i16* @usa, align 2
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @half_fix5(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fptosi half [[TMP1]] to i16
+// UNSIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
+// UNSIGNED-NEXT:    ret void
+//
+void half_fix5() {
+  usa = h;
+}
+
+// SIGNED-LABEL: @half_fix6(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000
+// SIGNED-NEXT:    [[TMP3:%.*]] = fptoui float [[TMP2]] to i64
+// SIGNED-NEXT:    store i64 [[TMP3]], i64* @ula, align 8
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @half_fix6(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = fptosi float [[TMP2]] to i64
+// UNSIGNED-NEXT:    store i64 [[TMP3]], i64* @ula, align 8
+// UNSIGNED-NEXT:    ret void
+//
+void half_fix6() {
+  ula = h;
+}
+
+
+// CHECK-LABEL: @half_sat1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
+// CHECK-NEXT:    [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f16(half [[TMP1]])
+// CHECK-NEXT:    store i8 [[TMP2]], i8* @sf_sat, align 1
+// CHECK-NEXT:    ret void
+//
+void half_sat1() {
+  sf_sat = h;
+}
+
+// CHECK-LABEL: @half_sat2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP2]])
+// CHECK-NEXT:    store i32 [[TMP3]], i32* @lf_sat, align 4
+// CHECK-NEXT:    ret void
+//
+void half_sat2() {
+  lf_sat = h;
+}
+
+// CHECK-LABEL: @half_sat3(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
+// CHECK-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]])
+// CHECK-NEXT:    store i16 [[TMP2]], i16* @sa_sat, align 2
+// CHECK-NEXT:    ret void
+//
+void half_sat3() {
+  sa_sat = h;
+}
+
+// CHECK-LABEL: @half_sat4(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]])
+// CHECK-NEXT:    store i64 [[TMP3]], i64* @la_sat, align 8
+// CHECK-NEXT:    ret void
+//
+void half_sat4() {
+  la_sat = h;
+}
+
+// SIGNED-LABEL: @half_sat5(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02
+// SIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP2]])
+// SIGNED-NEXT:    store i16 [[TMP3]], i16* @usa_sat, align 2
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @half_sat5(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]])
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]
+// UNSIGNED-NEXT:    store i16 [[SATMIN]], i16* @usa_sat, align 2
+// UNSIGNED-NEXT:    ret void
+//
+void half_sat5() {
+  usa_sat = h;
+}
+
+// SIGNED-LABEL: @half_sat6(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000
+// SIGNED-NEXT:    [[TMP3:%.*]] = call i64 @llvm.fptoui.sat.i64.f32(float [[TMP2]])
+// SIGNED-NEXT:    store i64 [[TMP3]], i64* @ula_sat, align 8
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @half_sat6(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, half* @h, align 2
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]])
+// UNSIGNED-NEXT:    [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]]
+// UNSIGNED-NEXT:    store i64 [[SATMIN]], i64* @ula_sat, align 8
+// UNSIGNED-NEXT:    ret void
+//
+void half_sat6() {
+  ula_sat = h;
+}
+
+
+// CHECK-LABEL: @fix_half1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i8, i8* @sf, align 1
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i8 [[TMP0]] to half
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
+// CHECK-NEXT:    store half [[TMP2]], half* @h, align 2
+// CHECK-NEXT:    ret void
+//
+void fix_half1() {
+  h = sf;
+}
+
+// CHECK-LABEL: @fix_half2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @lf, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
+// CHECK-NEXT:    store half [[TMP3]], half* @h, align 2
+// CHECK-NEXT:    ret void
+//
+void fix_half2() {
+  h = lf;
+}
+
+// CHECK-LABEL: @fix_half3(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @sa, align 2
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i16 [[TMP0]] to half
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
+// CHECK-NEXT:    store half [[TMP2]], half* @h, align 2
+// CHECK-NEXT:    ret void
+//
+void fix_half3() {
+  h = sa;
+}
+
+// CHECK-LABEL: @fix_half4(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load i64, i64* @la, align 8
+// CHECK-NEXT:    [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float
+// CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
+// CHECK-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
+// CHECK-NEXT:    store half [[TMP3]], half* @h, align 2
+// CHECK-NEXT:    ret void
+//
+void fix_half4() {
+  h = la;
+}
+
+// SIGNED-LABEL: @fix_half5(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
+// SIGNED-NEXT:    [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 3.906250e-03
+// SIGNED-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
+// SIGNED-NEXT:    store half [[TMP3]], half* @h, align 2
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @fix_half5(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = uitofp i16 [[TMP0]] to half
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
+// UNSIGNED-NEXT:    store half [[TMP2]], half* @h, align 2
+// UNSIGNED-NEXT:    ret void
+//
+void fix_half5() {
+  h = usa;
+}
+
+// SIGNED-LABEL: @fix_half6(
+// SIGNED-NEXT:  entry:
+// SIGNED-NEXT:    [[TMP0:%.*]] = load i64, i64* @ula, align 8
+// SIGNED-NEXT:    [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float
+// SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3DF0000000000000
+// SIGNED-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
+// SIGNED-NEXT:    store half [[TMP3]], half* @h, align 2
+// SIGNED-NEXT:    ret void
+//
+// UNSIGNED-LABEL: @fix_half6(
+// UNSIGNED-NEXT:  entry:
+// UNSIGNED-NEXT:    [[TMP0:%.*]] = load i64, i64* @ula, align 8
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
+// UNSIGNED-NEXT:    store half [[TMP3]], half* @h, align 2
+// UNSIGNED-NEXT:    ret void
+//
+void fix_half6() {
+  h = ula;
+}

llvm/include/llvm/IR/FixedPointBuilder.h

getCommonBinopSemantic(const FixedPointSemantics &LHSSema,
     auto C = LHSSema.getCommonSemantics(RHSSema);
     bool BothPadded =
         LHSSema.hasUnsignedPadding() && RHSSema.hasUnsignedPadding();
     return FixedPointSemantics(
         C.getWidth() + (unsigned)(BothPadded && C.isSaturated()), C.getScale(),
         C.isSigned(), C.isSaturated(), BothPadded);
   }
 
+  /// Given a floating point type and a fixed-point semantic, return a floating
+  /// point type which can accommodate the fixed-point semantic. This is either
+  /// \p Ty, or a floating point type with a larger exponent than Ty.
+  Type *getAccommodatingFloatType(Type *Ty, const FixedPointSemantics &Sema) {
+    const fltSemantics *FloatSema = &Ty->getFltSemantics();
+    while (!Sema.canAccommodateFloatSemantics(*FloatSema))
+      FloatSema = APFixedPoint::promoteFloatSemantics(FloatSema);
+    // There's seemingly no way to convert fltSemantics to Type.
+    return ConstantFP::get(Ty->getContext(), APFloat(*FloatSema))->getType();
+  }
+
 public:
   FixedPointBuilder(IRBuilderTy &Builder) : B(Builder) {}
 
   /// Convert an integer value representing a fixed-point number from one
   /// fixed-point semantic to another fixed-point semantic.
   /// \p Src     - The source value
   /// \p SrcSema - The fixed-point semantic of the source value
   /// \p DstSema - The resulting fixed-point semantic
public:
   Value *CreateIntegerToFixed(Value *Src, unsigned SrcIsSigned,
                               const FixedPointSemantics &DstSema) {
     return Convert(Src,
                    FixedPointSemantics::GetIntegerSemantics(
                        Src->getType()->getScalarSizeInBits(), SrcIsSigned),
                    DstSema, false);
   }
 
+  Value *CreateFixedToFloating(Value *Src, const FixedPointSemantics &SrcSema,
+                               Type *DstTy) {
+    Value *Result;
+    Type *OpTy = getAccommodatingFloatType(DstTy, SrcSema);
+    // Convert the raw fixed-point value directly to floating point. If the
+    // value is too large to fit, it will be rounded, not truncated.
+    Result = SrcSema.isSigned() ? B.CreateSIToFP(Src, OpTy)
+                                : B.CreateUIToFP(Src, OpTy);
+    // Rescale the integral-in-floating point by the scaling factor. This is
+    // lossless, except for overflow to infinity which is unlikely.
+    Result = B.CreateFMul(Result,
+        ConstantFP::get(OpTy, std::pow(2, -(int)SrcSema.getScale())));
+    if (OpTy != DstTy)
+      Result = B.CreateFPTrunc(Result, DstTy);
+    return Result;
+  }
+
+  Value *CreateFloatingToFixed(Value *Src, const FixedPointSemantics &DstSema) {
+    bool UseSigned = DstSema.isSigned() || DstSema.hasUnsignedPadding();
+    Value *Result = Src;
+    Type *OpTy = getAccommodatingFloatType(Src->getType(), DstSema);
+    if (OpTy != Src->getType())
+      Result = B.CreateFPExt(Result, OpTy);
+    // Rescale the floating point value so that its significant bits (for the
+    // purposes of the conversion) are in the integral range.
+    Result = B.CreateFMul(Result,
+        ConstantFP::get(OpTy, std::pow(2, DstSema.getScale())));
+
+    Type *ResultTy = B.getIntNTy(DstSema.getWidth());
+    if (DstSema.isSaturated()) {
+      Intrinsic::ID IID =
+          UseSigned ? Intrinsic::fptosi_sat : Intrinsic::fptoui_sat;
+      Result = B.CreateIntrinsic(IID, {ResultTy, OpTy}, {Result});
+    } else {
+      Result = UseSigned ? B.CreateFPToSI(Result, ResultTy)
+                         : B.CreateFPToUI(Result, ResultTy);
+    }
+
+    // When saturating unsigned-with-padding using signed operations, we may
+    // get negative values. Emit an extra clamp to zero.
+    if (DstSema.isSaturated() && DstSema.hasUnsignedPadding()) {
+      Constant *Zero = Constant::getNullValue(Result->getType());
+      Result =
+          B.CreateSelect(B.CreateICmpSLT(Result, Zero), Zero, Result, "satmin");
+    }
+
+    return Result;
+  }
+
   /// Add two fixed-point values and return the result in their common semantic.
   /// \p LHS     - The left hand side
   /// \p LHSSema - The semantic of the left hand side
   /// \p RHS     - The right hand side
   /// \p RHSSema - The semantic of the right hand side
   Value *CreateAdd(Value *LHS, const FixedPointSemantics &LHSSema,
                    Value *RHS, const FixedPointSemantics &RHSSema) {
     auto CommonSema = getCommonBinopSemantic(LHSSema, RHSSema);