[GISel] Add combines for unary FP instrs with constant operand

[mkitzan]

Summary

Patch adds five new GICombinerRules, one for each of the following unary FP instrs: G_FNEG, G_FABS, G_FPTRUNC, G_FSQRT, and G_FLOG2. The combine rules perform the FP operation on the constant operand and replace the original instr with the result. Patch additionally adds new combiner tests for the AArch64 target to test these new combiner rules.

[mkitzan]

Fixed clang-tidy feedback
(not enough)

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1481

Why go through double instead of preserving the APFloat?

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1462

Wrong rounding mode

[mkitzan]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1481

Because GIDefMatchData wants to have the variable uninitialized, which would call the default ctor of APFloat which is private.

See following pseudo code:

APFLoat MatchDataN; // calls APFloat()
if (matchCombineConstantFoldFpUnary(MI, MatchDataN))
  replaceInstWithAPFloat(MI, MatchDataN); // dummy function for example

The error looks like:

llvm-project/build/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc:343:11: error: calling a private constructor of class 'llvm::APFloat'
  APFloat MatchData23;
          ^
llvm-project/llvm/include/llvm/ADT/APFloat.h:842:3: note: implicitly declared private here
  APFloat() : U(IEEEdouble()) {
  ^

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1481

I guess you could work around this by keeping it wrapped in Optional<APFloat>

[mkitzan]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1462

Should the correct rounding mode be rmNearestTiesToEven? Is that only for G_FPTRUNC to LLT::scalar(16) and not LLT::scalar(32)?

1481

That could work. I ended up liking the current solution with replaceInstWithFConstant over my initial prototype where I tried passing around the APFloat&, because buildFConstant(DstOp, double) will convert the double to the appropriate APFloat depending on the LLT of the DstOp. That way we can just take advantage of the existing replaceInstWithFConstant function.

[mkitzan]

Rebased and resolved conflicts with new changes to Combine.td.

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1462

All of the non-constrained FP instructions assume rmNearestTiesToEven independent of the type

1481

This adds limitations on supporting other FP types, like fp128. It's best to keep everything in APFloat

[mkitzan]

• match / apply functions use Optional<APFloat> to pass info about the constant FP.
• Updated rounding modes to be rmNearestTiesToEven
• Refactored constantFoldFpUnary

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1486–1489

We should probably have a getFltSemanticForLLT utility somewhere for this

1506

setInstrAndDebugLoc?

[mkitzan]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1486–1489

Doesn't appear to be one for LLT. I suspect because unlike Type, with its discrete number of TypeIDs, LLT is very open ended.

1506

Right. Will pick this up in the next fixup.

[mkitzan]

• Rebased and fixed merge conflicts
• Changed setInstr to setInstrAndDebugLoc

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1486–1489

Yes, that's why there should be one. An FP LLT isn't any arbitrary number of bits, there's still only the handful of valid FP type combinations. We're probably going to have to add something to track f16 vs. bf16, but for now it's still a switch over a handful of valid FP sizes

[mkitzan]

• Added LLT helper function to get float semantic from scalar LLT (IEEE fp semantics only at the moment)
• Updated constantFoldFpUnary to use the new helper function
• Rebased / fixed merge conflicts

[paquette]

llvm/include/llvm/Target/GlobalISel/Combine.td

294

Is there any reason these are all separate combines, when they're all using the same function? Have you found it useful to be able to turn these on/off per-opcode?

Most other combines look like this:

def fconstant_matchinfo: GIDefMatchData<"Optional<APFloat>">;
def constant_fold_unary: GICombineRule <
  (defs root:$root, fconstant_matchinfo:$info),
  (match (wip_match_opcode G_FNEG, G_FABS, G_FPTRUNC, G_FSQRT, G_FLOG2):$root,
    [{ return Helper.matchCombineConstantFoldFpUnary(*${root}, ${info}); }]),
  (apply [{ return Helper.applyCombineConstantFoldFpUnary(*${root}, ${info}); }])
>;

295

Do you need separate matchinfo definitions?

I've noticed all the combines do this, but I think it would be better to just say

def fconstant_matchinfo: GIDefMatchData<"Optional<APFloat>">;

and then reuse it in every combine that uses it versus redefining matchinfo for every combine. (The rest of the combines could probably be cleaned up similarly in a later commit if this works)

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1449

This should probably assert or be a llvm_unreachable, since we never expect to run this with any other opcode.

[mkitzan]

llvm/include/llvm/Target/GlobalISel/Combine.td

294

No reason, except I didn't see that we could have a list of opcodes. Will fix that.

295

When they are all refactored into a single combine rule, we'll end up with one matchinfo for free.

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1449

Makes sense to have an assert. If somehow control flow ended up there, then the developer would likely want the compiler to assert rather than return None.

[mkitzan]

• Collapsed the many combine rules into a single combine rule with a list of matchable opcodes
• Made the default switch case in constantFoldFpUnary be llvm_unreachable

[arsenm]

llvm/include/llvm/Target/GlobalISel/Combine.td

295

Tablegen isn't smart enough to reuse identical matchinfos (although this should really be fixed)

[arsenm]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1443

Don't need to bother with the type check?

1459

Why special case S64 and not use getFltSemanticForLLT?

llvm/lib/CodeGen/LowLevelType.cpp

64

I would expect this to just do .getScalarSizeInBits

[mkitzan]

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

1443

Probably not anymore

1459

You're right, no longer necessary

llvm/lib/CodeGen/LowLevelType.cpp

64

I figured calling it on the vector element type would likely be the typical intended use, and calling on the aggregate vector type would likely be bug (and wouldn't really make much sense).

[mkitzan]

• Rebased and fixed merge conflicts
• Removed unnecessary type checks in constantFoldFpUnary
• Removed G_FPTRUNC special case for S64 in constantFoldFpUnary

[mkitzan]

Committed in c4e589b7954

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

 /// tryCombine which invokes all transformations. All of the transformations
 /// return true if the MachineInstruction changed and false otherwise.
 //
 //===--------------------------------------------------------------------===//
 
 #ifndef LLVM_CODEGEN_GLOBALISEL_COMBINER_HELPER_H
 #define LLVM_CODEGEN_GLOBALISEL_COMBINER_HELPER_H
 
+#include "llvm/ADT/APFloat.h"
 #include "llvm/CodeGen/LowLevelType.h"
 #include "llvm/CodeGen/Register.h"
 #include "llvm/Support/Alignment.h"
 
 namespace llvm {
 
 class GISelChangeObserver;
 class MachineIRBuilder;
public:
   /// Transform X, Y<dead> = G_UNMERGE Z -> X = G_TRUNC Z.
   bool matchCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI);
   bool applyCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI);
 
   /// Transform X, Y = G_UNMERGE(G_ZEXT(Z)) -> X = G_ZEXT(Z); Y = G_CONSTANT 0
   bool matchCombineUnmergeZExtToZExt(MachineInstr &MI);
   bool applyCombineUnmergeZExtToZExt(MachineInstr &MI);
 
+  /// Transform fp_instr(cst) to constant result of the fp operation.
+  bool matchCombineConstantFoldFpUnary(MachineInstr &MI,
+                                       Optional<APFloat> &Cst);
+  bool applyCombineConstantFoldFpUnary(MachineInstr &MI,
+                                       Optional<APFloat> &Cst);
+
   /// Transform IntToPtr(PtrToInt(x)) to x if cast is in the same address space.
   bool matchCombineI2PToP2I(MachineInstr &MI, Register &Reg);
   bool applyCombineI2PToP2I(MachineInstr &MI, Register &Reg);
 
   /// Transform PtrToInt(IntToPtr(x)) to x.
   bool matchCombineP2IToI2P(MachineInstr &MI, Register &Reg);
   bool applyCombineP2IToI2P(MachineInstr &MI, Register &Reg);
 

llvm/include/llvm/CodeGen/LowLevelType.h

 
 #include "llvm/Support/LowLevelTypeImpl.h"
 #include "llvm/Support/MachineValueType.h"
 
 namespace llvm {
 
 class DataLayout;
 class Type;
+struct fltSemantics;
 
 /// Construct a low-level type based on an LLVM type.
 LLT getLLTForType(Type &Ty, const DataLayout &DL);
 
 /// Get a rough equivalent of an MVT for a given LLT. MVT can't distinguish
 /// pointers, so these will convert to a plain integer.
 MVT getMVTForLLT(LLT Ty);
 
 /// Get a rough equivalent of an LLT for a given MVT. LLT does not yet support
 /// scalarable vector types, and will assert if used.
 LLT getLLTForMVT(MVT Ty);
 
+/// Get the appropriate floating point arithmetic semantic based on the bit size
+/// of the given scalar LLT.
+const llvm::fltSemantics &getFltSemanticForLLT(LLT Ty);
 }
 
 #endif // LLVM_CODEGEN_LOWLEVELTYPE_H

llvm/include/llvm/Target/GlobalISel/Combine.td

(match (wip_match_opcode G_MUL):$root,
     [{ return Helper.matchOperandIsZero(*${root}, 2); }]),
   (apply [{ return Helper.replaceSingleDefInstWithOperand(*${root}, 2); }])
 >;
 
 // Erase stores of undef values.
 def erase_undef_store : GICombineRule<
   (defs root:$root),
   (match (wip_match_opcode G_STORE):$root,
     [{ return Helper.matchUndefStore(*${root}); }]),
   (apply [{ return Helper.eraseInst(*${root}); }])
 >;
 
 def simplify_add_to_sub_matchinfo: GIDefMatchData<"std::tuple<Register, Register>">;
 def simplify_add_to_sub: GICombineRule <
   (defs root:$root, simplify_add_to_sub_matchinfo:$info),
   (match (wip_match_opcode G_ADD):$root,
     [{ return Helper.matchSimplifyAddToSub(*${root}, ${info}); }]),
   (apply [{ return Helper.applySimplifyAddToSub(*${root}, ${info});}])
 >;
 
+// Fold fp_op(cst) to the constant result of the floating point operation.
+def constant_fp_op_matchinfo: GIDefMatchData<"Optional<APFloat>">;
+def constant_fp_op: GICombineRule <
+  (defs root:$root, constant_fp_op_matchinfo:$info),
+  (match (wip_match_opcode G_FNEG, G_FABS, G_FPTRUNC, G_FSQRT, G_FLOG2):$root,
+    [{ return Helper.matchCombineConstantFoldFpUnary(*${root}, ${info}); }]),
+  (apply [{ return Helper.applyCombineConstantFoldFpUnary(*${root}, ${info}); }])
+>;
+
 // Fold int2ptr(ptr2int(x)) -> x
 def p2i_to_i2p_matchinfo: GIDefMatchData<"Register">;
 def p2i_to_i2p: GICombineRule<
   (defs root:$root, p2i_to_i2p_matchinfo:$info),
   (match (wip_match_opcode G_INTTOPTR):$root,
     [{ return Helper.matchCombineI2PToP2I(*${root}, ${info}); }]),
   (apply [{ return Helper.applyCombineI2PToP2I(*${root}, ${info}); }])
 >;
def all_combines : GICombineGroup<[trivial_combines, ptr_add_immed_chain,
     combines_for_extload, combine_indexed_load_store, undef_combines,
     identity_combines, simplify_add_to_sub,
     hoist_logic_op_with_same_opcode_hands,
     shl_ashr_to_sext_inreg, sext_inreg_of_load,
     width_reduction_combines, select_combines,
     known_bits_simplifications, ext_ext_fold,
     not_cmp_fold, opt_brcond_by_inverting_cond,
     unmerge_merge, fabs_fabs_fold, unmerge_cst, unmerge_dead_to_trunc,
-    unmerge_zext_to_zext, trunc_ext_fold, trunc_shl]>;
+    unmerge_zext_to_zext, trunc_ext_fold, trunc_shl,
+    constant_fp_op]>;

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

if (Opc == TargetOpcode::G_MEMCPY)
     return optimizeMemcpy(MI, Dst, Src, KnownLen, DstAlign, SrcAlign, IsVolatile);
   if (Opc == TargetOpcode::G_MEMMOVE)
     return optimizeMemmove(MI, Dst, Src, KnownLen, DstAlign, SrcAlign, IsVolatile);
   if (Opc == TargetOpcode::G_MEMSET)
     return optimizeMemset(MI, Dst, Src, KnownLen, DstAlign, IsVolatile);
   return false;
 }
 
+static Optional<APFloat> constantFoldFpUnary(unsigned Opcode, LLT DstTy,
+                                             const Register Op,
+                                             const MachineRegisterInfo &MRI) {
+  const ConstantFP *MaybeCst = getConstantFPVRegVal(Op, MRI);
+  if (!MaybeCst)
+    return None;
+
+  APFloat V = MaybeCst->getValueAPF();
+  switch (Opcode) {
+  default:
+    llvm_unreachable("Unexpected opcode!");
+  case TargetOpcode::G_FNEG: {
+    V.changeSign();
+    return V;
+  }
+  case TargetOpcode::G_FABS: {
+    V.clearSign();
+    return V;
+  }
+  case TargetOpcode::G_FPTRUNC:
+    break;
+  case TargetOpcode::G_FSQRT: {
+    bool Unused;
+    V.convert(APFloat::IEEEdouble(), APFloat::rmNearestTiesToEven, &Unused);
+    V = APFloat(sqrt(V.convertToDouble()));
+    break;
+  }
+  case TargetOpcode::G_FLOG2: {
+    bool Unused;
+    V.convert(APFloat::IEEEdouble(), APFloat::rmNearestTiesToEven, &Unused);
+    V = APFloat(log2(V.convertToDouble()));
+    break;
+  }
+  }
+  // Convert `APFloat` to appropriate IEEE type depending on `DstTy`. Otherwise,
+  // `buildFConstant` will assert on size mismatch. Only `G_FPTRUNC`, `G_FSQRT`,
+  // and `G_FLOG2` reach here.
+  bool Unused;
+  V.convert(getFltSemanticForLLT(DstTy), APFloat::rmNearestTiesToEven, &Unused);
+  return V;
+}
+
+bool CombinerHelper::matchCombineConstantFoldFpUnary(MachineInstr &MI,
+                                                     Optional<APFloat> &Cst) {
+  Register DstReg = MI.getOperand(0).getReg();
+  Register SrcReg = MI.getOperand(1).getReg();
+  LLT DstTy = MRI.getType(DstReg);
+  Cst = constantFoldFpUnary(MI.getOpcode(), DstTy, SrcReg, MRI);
+  return Cst.hasValue();
+}
+
+bool CombinerHelper::applyCombineConstantFoldFpUnary(MachineInstr &MI,
+                                                     Optional<APFloat> &Cst) {
+  assert(Cst.hasValue() && "Optional is unexpectedly empty!");
+  Builder.setInstrAndDebugLoc(MI);
+  MachineFunction &MF = Builder.getMF();
+  auto *FPVal = ConstantFP::get(MF.getFunction().getContext(), *Cst);
+  Register DstReg = MI.getOperand(0).getReg();
+  Builder.buildFConstant(DstReg, *FPVal);
+  MI.eraseFromParent();
+  return true;
+}
+
 bool CombinerHelper::matchPtrAddImmedChain(MachineInstr &MI,
                                            PtrAddChain &MatchInfo) {
   // We're trying to match the following pattern:
   //   %t1 = G_PTR_ADD %base, G_CONSTANT imm1
   //   %root = G_PTR_ADD %t1, G_CONSTANT imm2
   // -->
   //   %root = G_PTR_ADD %base, G_CONSTANT (imm1 + imm2)
 
   if (MI.getOpcode() != TargetOpcode::G_PTR_ADD)
     return false;
 
   Register Add2 = MI.getOperand(1).getReg();
   Register Imm1 = MI.getOperand(2).getReg();
   auto MaybeImmVal = getConstantVRegValWithLookThrough(Imm1, MRI);
   if (!MaybeImmVal)
     return false;
 
   MachineInstr *Add2Def = MRI.getUniqueVRegDef(Add2);
   if (!Add2Def || Add2Def->getOpcode() != TargetOpcode::G_PTR_ADD)

llvm/lib/CodeGen/LowLevelType.cpp

 //===-- llvm/CodeGen/LowLevelType.cpp -------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file This file implements the more header-heavy bits of the LLT class to
 /// avoid polluting users' namespaces.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/ADT/APFloat.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
 LLT llvm::getLLTForType(Type &Ty, const DataLayout &DL) {
   if (auto VTy = dyn_cast<VectorType>(&Ty)) {
     auto NumElements = cast<FixedVectorType>(VTy)->getNumElements();

 
 LLT llvm::getLLTForMVT(MVT Ty) {
   if (!Ty.isVector())
     return LLT::scalar(Ty.getSizeInBits());
 
   return LLT::vector(Ty.getVectorNumElements(),
                      Ty.getVectorElementType().getSizeInBits());
 }
+
+const llvm::fltSemantics &llvm::getFltSemanticForLLT(LLT Ty) {
+  assert(Ty.isScalar() && "Expected a scalar type.");
+  switch (Ty.getSizeInBits()) {
+  case 16:
+    return APFloat::IEEEhalf();
+  case 32:
+    return APFloat::IEEEsingle();
+  case 64:
+    return APFloat::IEEEdouble();
+  case 128:
+    return APFloat::IEEEquad();
+  }
+  llvm_unreachable("Invalid FP type size.");
+}

llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir

liveins: $x0
     ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $x0
     ; CHECK: [[FABS:%[0-9]+]]:_(<2 x s32>) = G_FABS [[COPY]]
     ; CHECK: $x0 = COPY [[FABS]](<2 x s32>)
     %0:_(<2 x s32>) = COPY $x0
     %1:_(<2 x s32>) = G_FABS %0(<2 x s32>)
     %2:_(<2 x s32>) = G_FABS %1(<2 x s32>)
     $x0 = COPY %2(<2 x s32>)
 ...
+---
+name:            test_combine_half_fabs_neg_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_half_fabs_neg_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4580
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s16) = G_FCONSTANT half 0xHC580
+    %1:_(s16) = G_FABS %0
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_half_fabs_pos_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_half_fabs_pos_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4580
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s16) = G_FCONSTANT half 0xH4580
+    %1:_(s16) = G_FABS %0
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_float_fabs_neg_constant
+body:             |
+  bb.1:
+    liveins: $w0
+    ; CHECK-LABEL: name: test_combine_float_fabs_neg_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 5.500000e+00
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s32) = G_FCONSTANT float -5.500000e+00
+    %1:_(s32) = G_FABS %0
+    $w0 = COPY %1(s32)
+...
+---
+name:            test_combine_float_fabs_pos_constant
+body:             |
+  bb.1:
+    liveins: $w0
+    ; CHECK-LABEL: name: test_combine_float_fabs_pos_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 5.500000e+00
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s32) = G_FCONSTANT float -5.500000e+00
+    %1:_(s32) = G_FABS %0
+    $w0 = COPY %1(s32)
+...
+---
+name:            test_combine_double_fabs_neg_constant
+body:             |
+  bb.1:
+    liveins: $x0
+    ; CHECK-LABEL: name: test_combine_double_fabs_neg_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 4.200000e+00
+    ; CHECK: $x0 = COPY [[C]](s64)
+    %0:_(s64) = G_FCONSTANT double -4.200000e+00
+    %1:_(s64) = G_FABS %0
+    $x0 = COPY %1(s64)
+...
+---
+name:            test_combine_double_fabs_pos_constant
+body:             |
+  bb.1:
+    liveins: $x0
+    ; CHECK-LABEL: name: test_combine_double_fabs_pos_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 4.200000e+00
+    ; CHECK: $x0 = COPY [[C]](s64)
+    %0:_(s64) = G_FCONSTANT double 4.200000e+00
+    %1:_(s64) = G_FABS %0
+    $x0 = COPY %0(s64)
+...

llvm/test/CodeGen/AArch64/GlobalISel/combine-flog2.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name:            test_combine_half_flog2_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_half_flog2_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4000
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s16) = G_FCONSTANT half 4.000000e+00
+    %1:_(s16) = G_FLOG2 %0
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_float_flog2_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_float_flog2_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s32) = G_FCONSTANT float 4.000000e+00
+    %1:_(s32) = G_FLOG2 %0
+    $w0 = COPY %1(s32)
+...
+---
+name:            test_combine_double_flog2_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_double_flog2_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00
+    ; CHECK: $x0 = COPY [[C]](s64)
+    %0:_(s64) = G_FCONSTANT double 4.000000e+00
+    %1:_(s64) = G_FLOG2 %0
+    $x0 = COPY %1(s64)
+...

llvm/test/CodeGen/AArch64/GlobalISel/combine-fneg.mir

liveins: $x0
     ; CHECK-LABEL: name: test_combine_fneg_fneg_vec
     ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $x0
     ; CHECK: $x0 = COPY [[COPY]](<2 x s32>)
     %0:_(<2 x s32>) = COPY $x0
     %1:_(<2 x s32>) = G_FNEG %0(<2 x s32>)
     %2:_(<2 x s32>) = G_FNEG %1(<2 x s32>)
     $x0 = COPY %2(<2 x s32>)
 ...
+---
+name:            test_combine_half_fneg_neg_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_half_fneg_neg_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4580
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s16) = G_FCONSTANT half 0xHC580
+    %1:_(s16) = G_FNEG %0
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_half_fneg_pos_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_half_fneg_pos_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xHC580
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s16) = G_FCONSTANT half 0xH4580
+    %1:_(s16) = G_FNEG %0
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_float_fneg_neg_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_float_fneg_neg_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 5.500000e+00
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s32) = G_FCONSTANT float -5.500000e+00
+    %1:_(s32) = G_FNEG %0
+    $w0 = COPY %1(s32)
+...
+---
+name:            test_combine_float_fneg_pos_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_float_fneg_pos_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -5.500000e+00
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s32) = G_FCONSTANT float 5.500000e+00
+    %1:_(s32) = G_FNEG %0
+    $w0 = COPY %1(s32)
+...
+---
+name:            test_combine_double_fneg_neg_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_double_fneg_neg_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 4.200000e+00
+    ; CHECK: $x0 = COPY [[C]](s64)
+    %0:_(s64) = G_FCONSTANT double -4.200000e+00
+    %1:_(s64) = G_FNEG %0
+    $x0 = COPY %1(s64)
+...
+---
+name:            test_combine_double_fneg_pos_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_double_fneg_pos_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double -4.200000e+00
+    ; CHECK: $x0 = COPY [[C]](s64)
+    %0:_(s64) = G_FCONSTANT double 4.200000e+00
+    %1:_(s64) = G_FNEG %0
+    $x0 = COPY %1(s64)
+...

llvm/test/CodeGen/AArch64/GlobalISel/combine-fptrunc.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name:            test_combine_float_to_half_fptrunc_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_float_to_half_fptrunc_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4580
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s32) = G_FCONSTANT float 5.500000e+00
+    %1:_(s16) = G_FPTRUNC %0(s32)
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_double_to_half_fptrunc_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_double_to_half_fptrunc_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4433
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s64) = G_FCONSTANT double 4.200000e+00
+    %1:_(s16) = G_FPTRUNC %0(s64)
+    $h0 = COPY %1(s16)
+...
+---
+name:            test_combine_double_to_foat_fptrunc_constant
+body:             |
+  bb.1:
+    ; CHECK-LABEL: name: test_combine_double_to_foat_fptrunc_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x4010CCCCC0000000
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s64) = G_FCONSTANT double 4.200000e+00
+    %1:_(s32) = G_FPTRUNC %0(s64)
+    $w0 = COPY %1(s32)
+...

llvm/test/CodeGen/AArch64/GlobalISel/combine-fsqrt.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name:            test_combine_half_fsqrt_constant
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_half_fsqrt_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4000
+    ; CHECK: $h0 = COPY [[C]](s16)
+    %0:_(s16) = G_FCONSTANT half 4.000000e+00
+    %1:_(s16) = G_FSQRT %0
+    $h0 = COPY %1
+...
+---
+name:            test_combine_float_fsqrt_constant
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_float_fsqrt_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00
+    ; CHECK: $w0 = COPY [[C]](s32)
+    %0:_(s32) = G_FCONSTANT float 4.000000e+00
+    %1:_(s32) = G_FSQRT %0
+    $w0 = COPY %1
+...
+---
+name:            test_combine_double_fsqrt_constant
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_double_fsqrt_constant
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00
+    ; CHECK: $x0 = COPY [[C]](s64)
+    %0:_(s64) = G_FCONSTANT double 4.000000e+00
+    %1:_(s64) = G_FSQRT %0
+    $x0 = COPY %1
+...