This is an archive of the discontinued LLVM Phabricator instance.

[DAG][AMDGPU][X86] Add SimplifyMultipleUseDemandedBits handling for SIGN/ZERO_EXTEND + SIGN/ZERO_EXTEND_VECTOR_INREG
ClosedPublic

Authored by RKSimon on Jul 29 2020, 9:05 AM.

Details

Summary

Peek through multiple use ops like we already for ANY_EXTEND/ANY_EXTEND_VECTOR_INREG

Diff Detail

Event Timeline

RKSimon created this revision.Jul 29 2020, 9:05 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 29 2020, 9:05 AM
RKSimon requested review of this revision.Jul 29 2020, 9:05 AM
arsenm accepted this revision.Jul 29 2020, 9:08 AM
This revision is now accepted and ready to land.Jul 29 2020, 9:08 AM
This revision was landed with ongoing or failed builds.Jul 29 2020, 10:11 AM
This revision was automatically updated to reflect the committed changes.