[IR][MSP430] Expose the "msp430_builtin" calling convention to .ll

[atrosinenko]

Summary

Accompanying patch for D84602: [MSP430] Expose msp430_builtin calling convention to C code that gives a meaningful name for msp430_builtin calling convention in .ll sources (msp430_builtincc instead of cc94).

[atrosinenko]

A shy ping :)

On one hand, this patch is rather useless without D84602: [MSP430] Expose msp430_builtin calling convention to C code and scary D84636: [RFC] Make the default LibCall implementations from compiler-rt builtins library more customizable. On the other hand, this one is expected to merely rename a cc94 attribute to meaningful msp430_builtincc. The only possible drawback I see is that someone may want to give it more descriptive name, as only a small subset of "builtin" functions (LibCall, in fact) use it while most of them just have a default CC. In this patch, it is named after the pre-existed CallingConv::MSP430_BUILTIN.

Another note is that it is not expected to be used by someone except for compiler-rt developers. Frankly speaking, this patch does not block anything at all, it just adds some neater name to an entity that is expected to be used by means of __attribute__. So, compiler-rt developers will probably only need it while reading the listings for debug purposes, as well. :)

llvm/lib/AsmParser/LLLexer.cpp

#define KEYWORD(STR)                                                           \
   KEYWORD(x86_fastcallcc);
   KEYWORD(x86_thiscallcc);
   KEYWORD(x86_vectorcallcc);
   KEYWORD(arm_apcscc);
   KEYWORD(arm_aapcscc);
   KEYWORD(arm_aapcs_vfpcc);
   KEYWORD(aarch64_vector_pcs);
   KEYWORD(aarch64_sve_vector_pcs);
+  KEYWORD(msp430_builtincc);
   KEYWORD(msp430_intrcc);
   KEYWORD(avr_intrcc);
   KEYWORD(avr_signalcc);
   KEYWORD(ptx_kernel);
   KEYWORD(ptx_device);
   KEYWORD(spir_kernel);
   KEYWORD(spir_func);
   KEYWORD(intel_ocl_bicc);

llvm/lib/AsmParser/LLParser.cpp

 ///   ::= 'x86_fastcallcc'
 ///   ::= 'x86_thiscallcc'
 ///   ::= 'x86_vectorcallcc'
 ///   ::= 'arm_apcscc'
 ///   ::= 'arm_aapcscc'
 ///   ::= 'arm_aapcs_vfpcc'
 ///   ::= 'aarch64_vector_pcs'
 ///   ::= 'aarch64_sve_vector_pcs'
+///   ::= 'msp430_builtincc'
 ///   ::= 'msp430_intrcc'
 ///   ::= 'avr_intrcc'
 ///   ::= 'avr_signalcc'
 ///   ::= 'ptx_kernel'
 ///   ::= 'ptx_device'
 ///   ::= 'spir_func'
 ///   ::= 'spir_kernel'
 ///   ::= 'x86_64_sysvcc'
bool LLParser::ParseOptionalCallingConv(unsigned &CC) {
   case lltok::kw_x86_vectorcallcc:CC = CallingConv::X86_VectorCall; break;
   case lltok::kw_arm_apcscc:     CC = CallingConv::ARM_APCS; break;
   case lltok::kw_arm_aapcscc:    CC = CallingConv::ARM_AAPCS; break;
   case lltok::kw_arm_aapcs_vfpcc:CC = CallingConv::ARM_AAPCS_VFP; break;
   case lltok::kw_aarch64_vector_pcs:CC = CallingConv::AArch64_VectorCall; break;
   case lltok::kw_aarch64_sve_vector_pcs:
     CC = CallingConv::AArch64_SVE_VectorCall;
     break;
+  case lltok::kw_msp430_builtincc:CC = CallingConv::MSP430_BUILTIN; break;
   case lltok::kw_msp430_intrcc:  CC = CallingConv::MSP430_INTR; break;
   case lltok::kw_avr_intrcc:     CC = CallingConv::AVR_INTR; break;
   case lltok::kw_avr_signalcc:   CC = CallingConv::AVR_SIGNAL; break;
   case lltok::kw_ptx_kernel:     CC = CallingConv::PTX_Kernel; break;
   case lltok::kw_ptx_device:     CC = CallingConv::PTX_Device; break;
   case lltok::kw_spir_kernel:    CC = CallingConv::SPIR_KERNEL; break;
   case lltok::kw_spir_func:      CC = CallingConv::SPIR_FUNC; break;
   case lltok::kw_intel_ocl_bicc: CC = CallingConv::Intel_OCL_BI; break;

llvm/lib/AsmParser/LLToken.h

enum Kind {
   kw_x86_thiscallcc,
   kw_x86_vectorcallcc,
   kw_x86_regcallcc,
   kw_arm_apcscc,
   kw_arm_aapcscc,
   kw_arm_aapcs_vfpcc,
   kw_aarch64_vector_pcs,
   kw_aarch64_sve_vector_pcs,
+  kw_msp430_builtincc,
   kw_msp430_intrcc,
   kw_avr_intrcc,
   kw_avr_signalcc,
   kw_ptx_kernel,
   kw_ptx_device,
   kw_spir_kernel,
   kw_spir_func,
   kw_x86_64_sysvcc,

llvm/lib/IR/AsmWriter.cpp

static void PrintCallingConv(unsigned cc, raw_ostream &Out) {
   case CallingConv::Intel_OCL_BI:  Out << "intel_ocl_bicc"; break;
   case CallingConv::ARM_APCS:      Out << "arm_apcscc"; break;
   case CallingConv::ARM_AAPCS:     Out << "arm_aapcscc"; break;
   case CallingConv::ARM_AAPCS_VFP: Out << "arm_aapcs_vfpcc"; break;
   case CallingConv::AArch64_VectorCall: Out << "aarch64_vector_pcs"; break;
   case CallingConv::AArch64_SVE_VectorCall:
     Out << "aarch64_sve_vector_pcs";
     break;
+  case CallingConv::MSP430_BUILTIN:Out << "msp430_builtincc"; break;
   case CallingConv::MSP430_INTR:   Out << "msp430_intrcc"; break;
   case CallingConv::AVR_INTR:      Out << "avr_intrcc "; break;
   case CallingConv::AVR_SIGNAL:    Out << "avr_signalcc "; break;
   case CallingConv::PTX_Kernel:    Out << "ptx_kernel"; break;
   case CallingConv::PTX_Device:    Out << "ptx_device"; break;
   case CallingConv::X86_64_SysV:   Out << "x86_64_sysvcc"; break;
   case CallingConv::Win64:         Out << "win64cc"; break;
   case CallingConv::SPIR_FUNC:     Out << "spir_func"; break;

llvm/test/Bitcode/compatibility.ll

 declare cc91 void @f.cc91()
 ; CHECK: declare amdgpu_kernel void @f.cc91()
 declare amdgpu_kernel void @f.amdgpu_kernel()
 ; CHECK: declare amdgpu_kernel void @f.amdgpu_kernel()
 declare cc93 void @f.cc93()
 ; CHECK: declare amdgpu_hs void @f.cc93()
 declare amdgpu_hs void @f.amdgpu_hs()
 ; CHECK: declare amdgpu_hs void @f.amdgpu_hs()
+declare cc94 void @f.cc94()
+; CHECK: declare msp430_builtincc void @f.cc94()
+declare msp430_builtincc void @f.msp430_builtincc()
+; CHECK: declare msp430_builtincc void @f.msp430_builtincc()
 declare cc95 void @f.cc95()
 ; CHECK: declare amdgpu_ls void @f.cc95()
 declare amdgpu_ls void @f.amdgpu_ls()
 ; CHECK: declare amdgpu_ls void @f.amdgpu_ls()
 declare cc96 void @f.cc96()
 ; CHECK: declare amdgpu_es void @f.cc96()
 declare amdgpu_es void @f.amdgpu_es()
 ; CHECK: declare amdgpu_es void @f.amdgpu_es()

llvm/utils/vim/syntax/llvm.vim

syn keyword llvmKeyword
       \ linkonce
       \ linkonce_odr
       \ localdynamic
       \ localexec
       \ local_unnamed_addr
       \ minsize
       \ module
       \ monotonic
+      \ msp430_builtincc
       \ msp430_intrcc
       \ musttail
       \ naked
       \ nest
       \ noalias
       \ nobuiltin
       \ nocapture
       \ noimplicitfloat

llvm/utils/vscode/llvm/syntaxes/ll.tmLanguage.yaml

- match: "\\bacq_rel\\b|\
             \\blinkonce\\b|\
             \\blinkonce_odr\\b|\
             \\blocaldynamic\\b|\
             \\blocalexec\\b|\
             \\blocal_unnamed_addr\\b|\
             \\bminsize\\b|\
             \\bmodule\\b|\
             \\bmonotonic\\b|\
+            \\bmsp430_builtincc\\b|\
             \\bmsp430_intrcc\\b|\
             \\bmusttail\\b|\
             \\bnaked\\b|\
             \\bnest\\b|\
             \\bnoalias\\b|\
             \\bnobuiltin\\b|\
             \\bnocapture\\b|\
             \\bnoimplicitfloat\\b|\