[X86] Fix a typo error.

[pengfei]

Summary

This will result opcode MULX32Hrm been emitted to MULX32Hrr.

[craig.topper]

Thanks. Are you able to provide a test case?

[pengfei]

Add a test case. Thanks Craig.

[craig.topper]

LGTM

llvm/lib/Target/X86/X86MCInstLower.cpp

 //===-- X86MCInstLower.cpp - Convert X86 MachineInstr to an MCInst --------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains code to lower X86 MachineInstrs to their corresponding
void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
   case X86::MULX32Hrm:
   case X86::MULX64Hrr:
   case X86::MULX64Hrm: {
     // Turn into regular MULX by duplicating the destination.
     unsigned NewOpc;
     switch (OutMI.getOpcode()) {
     default: llvm_unreachable("Invalid opcode");
     case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break;
-    case X86::MULX32Hrm: NewOpc = X86::MULX32rr; break;
+    case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break;
     case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break;
     case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break;
     }
     OutMI.setOpcode(NewOpc);
     // Duplicate the destination.
     unsigned DestReg = OutMI.getOperand(0).getReg();
     OutMI.insert(OutMI.begin(), MCOperand::createReg(DestReg));
     break;

llvm/test/CodeGen/X86/bug80500.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686 -mcpu=skylake | FileCheck %s
 
 ; Fix for a typo introduced by D80500
 
 define i32 @load_fold_udiv1(i32* %p) {
 ; CHECK-LABEL: load_fold_udiv1:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl $-2004318071, %edx # imm = 0x88888889
-; CHECK-NEXT:    mulxl %eax, %eax, %eax
+; CHECK-NEXT:    mulxl (%eax), %eax, %eax
 ; CHECK-NEXT:    shrl $3, %eax
 ; CHECK-NEXT:    retl
   %v = load i32, i32* %p, align 4
   %ret = udiv i32 %v, 15
   ret i32 %ret
 }