[CodeGen] Fix warnings in getVectorTypeBreakdown

[david-arm]

Summary

Added NextPowerOf2() routine to TypeSize and rewritten the code
in getVectorTypeBreakdown to avoid warnings being generated.

[sdesmalen]

llvm/lib/CodeGen/TargetLoweringBase.cpp

1478

Why did you reorder the conditions?

[david-arm]

llvm/lib/CodeGen/TargetLoweringBase.cpp

1478

Because NewVTSize isn't used at all unless the bitsLT condition is met so it seemed wasteful to calculate it always.

[sdesmalen]

LGTM

llvm/include/llvm/Support/TypeSize.h

#endif
 
   TypeSize operator/(int RHS) const {
     return { MinSize / RHS, IsScalable };
   }
 
   TypeSize operator/(int64_t RHS) const {
     return { MinSize / RHS, IsScalable };
   }
+
+  TypeSize NextPowerOf2() const {
+    return TypeSize(llvm::NextPowerOf2(MinSize), IsScalable);
+  }
 };
 
 /// Returns a TypeSize with a known minimum size that is the next integer
 /// (mod 2**64) that is greater than or equal to \p Value and is a multiple
 /// of \p Align. \p Align must be non-zero.
 ///
 /// Similar to the alignTo functions in MathExtras.h
 inline TypeSize alignTo(TypeSize Size, uint64_t Align) {

llvm/lib/CodeGen/TargetLoweringBase.cpp

unsigned TargetLoweringBase::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
 
   EVT NewVT = EVT::getVectorVT(Context, EltTy, EltCnt);
   if (!isTypeLegal(NewVT))
     NewVT = EltTy;
   IntermediateVT = NewVT;
 
   MVT DestVT = getRegisterType(Context, NewVT);
   RegisterVT = DestVT;
-  unsigned NewVTSize = NewVT.getSizeInBits();
 
+  if (EVT(DestVT).bitsLT(NewVT)) {  // Value is expanded, e.g. i64 -> i16.
+    TypeSize NewVTSize = NewVT.getSizeInBits();
     // Convert sizes such as i33 to i64.
-  if (!isPowerOf2_32(NewVTSize))
-    NewVTSize = NextPowerOf2(NewVTSize);
-
-  if (EVT(DestVT).bitsLT(NewVT))   // Value is expanded, e.g. i64 -> i16.
+    if (!isPowerOf2_32(NewVTSize.getKnownMinSize()))
+      NewVTSize = NewVTSize.NextPowerOf2();
     return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
+  }
 
   // Otherwise, promotion or legal types use the same number of registers as
   // the vector decimated to the appropriate level.
   return NumVectorRegs;
 }
 
 bool TargetLoweringBase::isSuitableForJumpTable(const SwitchInst *SI,
                                                 uint64_t NumCases,