This is an archive of the discontinued LLVM Phabricator instance.

Show First 20 Lines • Show All 223 Lines • ▼ Show 20 Lines	#endif

TypeSize operator/(int RHS) const {		TypeSize operator/(int RHS) const {
return { MinSize / RHS, IsScalable };		return { MinSize / RHS, IsScalable };
}		}

TypeSize operator/(int64_t RHS) const {		TypeSize operator/(int64_t RHS) const {
return { MinSize / RHS, IsScalable };		return { MinSize / RHS, IsScalable };
}		}

		TypeSize NextPowerOf2() const {
		return TypeSize(llvm::NextPowerOf2(MinSize), IsScalable);
		}
};		};

/// Returns a TypeSize with a known minimum size that is the next integer		/// Returns a TypeSize with a known minimum size that is the next integer
/// (mod 2**64) that is greater than or equal to \p Value and is a multiple		/// (mod 2**64) that is greater than or equal to \p Value and is a multiple
/// of \p Align. \p Align must be non-zero.		/// of \p Align. \p Align must be non-zero.
///		///
/// Similar to the alignTo functions in MathExtras.h		/// Similar to the alignTo functions in MathExtras.h
inline TypeSize alignTo(TypeSize Size, uint64_t Align) {		inline TypeSize alignTo(TypeSize Size, uint64_t Align) {
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llvm/lib/CodeGen/TargetLoweringBase.cpp

Show First 20 Lines • Show All 1,468 Lines • ▼ Show 20 Lines	unsigned TargetLoweringBase::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,

EVT NewVT = EVT::getVectorVT(Context, EltTy, EltCnt);		EVT NewVT = EVT::getVectorVT(Context, EltTy, EltCnt);
if (!isTypeLegal(NewVT))		if (!isTypeLegal(NewVT))
NewVT = EltTy;		NewVT = EltTy;
IntermediateVT = NewVT;		IntermediateVT = NewVT;

MVT DestVT = getRegisterType(Context, NewVT);		MVT DestVT = getRegisterType(Context, NewVT);
RegisterVT = DestVT;		RegisterVT = DestVT;
unsigned NewVTSize = NewVT.getSizeInBits();

		if (EVT(DestVT).bitsLT(NewVT)) { // Value is expanded, e.g. i64 -> i16.
		TypeSize NewVTSize = NewVT.getSizeInBits();
// Convert sizes such as i33 to i64.		// Convert sizes such as i33 to i64.
if (!isPowerOf2_32(NewVTSize))		if (!isPowerOf2_32(NewVTSize.getKnownMinSize()))
NewVTSize = NextPowerOf2(NewVTSize);		NewVTSize = NewVTSize.NextPowerOf2();
		sdesmalenUnsubmitted Done Reply Inline Actions Why did you reorder the conditions? sdesmalen: Why did you reorder the conditions?
		david-armAuthorUnsubmitted Done Reply Inline Actions Because NewVTSize isn't used at all unless the bitsLT condition is met so it seemed wasteful to calculate it always. david-arm: Because NewVTSize isn't used at all unless the bitsLT condition is met so it seemed wasteful to…

if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());		return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
		}

// Otherwise, promotion or legal types use the same number of registers as		// Otherwise, promotion or legal types use the same number of registers as
// the vector decimated to the appropriate level.		// the vector decimated to the appropriate level.
return NumVectorRegs;		return NumVectorRegs;
}		}

bool TargetLoweringBase::isSuitableForJumpTable(const SwitchInst *SI,		bool TargetLoweringBase::isSuitableForJumpTable(const SwitchInst *SI,
uint64_t NumCases,		uint64_t NumCases,
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This is an archive of the discontinued LLVM Phabricator instance.

[CodeGen] Fix warnings in getVectorTypeBreakdownClosedPublic

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Diff 271614

llvm/include/llvm/Support/TypeSize.h

llvm/lib/CodeGen/TargetLoweringBase.cpp

[CodeGen] Fix warnings in getVectorTypeBreakdown
ClosedPublic