[NFC]][PowerPC] Remove unused intrinsic for old CTR loop pass

[ZhangKang]

Summary

In the patch D62907 the PPC CTRLoops pass has been replaced by Generic Hardware Loop pass,
and it has imported some new intrinsic for Generic Hardware Loop.

The old intrinsic used in PPC CTRLoops int_ppc_mtctr and int_ppc_is_decremented_ctr_nonzero
is been replaced by int_set_loop_iterations and loop_decrement.

This patch is to remove above unused two instrinsic.

[shchenz]

LGTM. Thanks for cleaning this up.

llvm/include/llvm/IR/IntrinsicsPowerPC.td

let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
 
   // sync instruction (i.e. sync 0, a.k.a hwsync)
   def int_ppc_sync : Intrinsic<[], [], []>;
   // lwsync is sync 1
   def int_ppc_lwsync : Intrinsic<[], [], []>;
   // eieio instruction
   def int_ppc_eieio : Intrinsic<[],[],[]>;
 
-  // Intrinsics used to generate ctr-based loops. These should only be
-  // generated by the PowerPC backend!
-  // The branch intrinsic is marked as NoDuplicate because loop rotation will
-  // attempt to duplicate it forming loops where a block reachable from one
-  // instance of it can contain another.
-  def int_ppc_mtctr : Intrinsic<[], [llvm_anyint_ty], []>;
-  def int_ppc_is_decremented_ctr_nonzero :
-    Intrinsic<[llvm_i1_ty], [], [IntrNoDuplicate]>;
-
   // Intrinsics for [double]word extended forms of divide instructions
   def int_ppc_divwe : GCCBuiltin<"__builtin_divwe">,
                       Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
                                 [IntrNoMem]>;
   def int_ppc_divweu : GCCBuiltin<"__builtin_divweu">,
                        Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
                                  [IntrNoMem]>;
   def int_ppc_divde : GCCBuiltin<"__builtin_divde">,

llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp

if (CallInst *CI = dyn_cast<CallInst>(J)) {
 
       if (Function *F = CI->getCalledFunction()) {
         // Most intrinsics don't become function calls, but some might.
         // sin, cos, exp and log are always calls.
         unsigned Opcode = 0;
         if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
           switch (F->getIntrinsicID()) {
           default: continue;
-          // If we have a call to ppc_is_decremented_ctr_nonzero, or ppc_mtctr
+          // If we have a call to loop_decrement or set_loop_iterations,
           // we're definitely using CTR.
           case Intrinsic::set_loop_iterations:
           case Intrinsic::loop_decrement:
             return true;
 
           // Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp
           // because, although it does clobber the counter register, the
           // control can't then return to inside the loop unless there is also

llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll

 ; RUN: opt -early-cse-memssa -loop-rotate -licm -loop-rotate -S %s -o - | FileCheck %s
 ; ModuleID = 'bugpoint-reduced-simplified.bc'
 source_filename = "bugpoint-output-8903f29.bc"
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
 
 define void @test(i64 %arg.ssa, i64 %arg.nb) local_unnamed_addr {
 ; Ensure that loop rotation doesn't duplicate the call to
-; llvm.ppc.is.decremented.ctr.nonzero
+; llvm.loop.decrement
 ; CHECK-LABEL: test
-; CHECK: call i1 @llvm.ppc.is.decremented.ctr.nonzero
-; CHECK-NOT: call i1 @llvm.ppc.is.decremented.ctr.nonzero
-; CHECK: declare i1 @llvm.ppc.is.decremented.ctr.nonzero
+; CHECK: call i1 @llvm.loop.decrement
+; CHECK-NOT: call i1 @llvm.loop.decrement
+; CHECK: declare i1 @llvm.loop.decrement
 entry:
   switch i32 undef, label %BB_8 [
     i32 -2, label %BB_9
     i32 0, label %BB_9
   ]
 
 BB_1:                                    ; preds = %BB_12, %BB_4
   %bcount.1.us = phi i64 [ %.810.us, %BB_4 ], [ 0, %BB_12 ]
   %0 = add i64 %arg.ssa, %bcount.1.us
   %.568.us = load i32, i32* undef, align 4
   %.15.i.us = icmp slt i32 0, %.568.us
   br i1 %.15.i.us, label %BB_3, label %BB_2
 
 BB_2:                                          ; preds = %BB_1
   %.982.us = add nsw i64 %0, 1
   unreachable
 
 BB_3:                                          ; preds = %BB_1
   %1 = add i64 %arg.ssa, %bcount.1.us
   %2 = add i64 %1, 1
-  %3 = call i1 @llvm.ppc.is.decremented.ctr.nonzero()
+  %3 = call i1 @llvm.loop.decrement.i32(i32 1)
   br i1 %3, label %BB_4, label %BB_7
 
 BB_4:                                          ; preds = %BB_3
   %.810.us = add nuw nsw i64 %bcount.1.us, 1
   br label %BB_1
 
 BB_5:                                         ; preds = %BB_7, %BB_5
   %lsr.iv20.i116 = phi i64 [ %2, %BB_7 ], [ %lsr.iv.next21.i126, %BB_5 ]

 
 BB_10:                               ; preds = %BB_9
   br label %BB_11
 
 BB_11:                                         ; preds = %BB_11, %BB_10
   br i1 undef, label %BB_11, label %BB_12
 
 BB_12:                                         ; preds = %BB_11
-  call void @llvm.ppc.mtctr.i64(i64 %arg.nb)
+  call void @llvm.set.loop.iterations.i64(i64 %arg.nb)
   br label %BB_1
 }
 
 ; Function Attrs: nounwind
-declare void @llvm.ppc.mtctr.i64(i64) #0
+declare void @llvm.set.loop.iterations.i64(i64) #0
 
 ; Function Attrs: nounwind
-declare i1 @llvm.ppc.is.decremented.ctr.nonzero() #0
+declare i1 @llvm.loop.decrement.i32(i32) #0
 
 attributes #0 = { nounwind }