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[llvm][SVE] IR intrinsics for quadword permutation instructions.
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Authored by fpetrogalli on May 29 2020, 3:50 PM.

Details

Summary

Adding intrinsics and codegen patterns for:

  • trn1 <Zd>.q, <Zm>.q, <Zn>.q
  • trn2 <Zd>.q, <Zm>.q, <Zn>.q
  • zip1 <Zd>.q, <Zm>.q, <Zn>.q
  • zip2 <Zd>.q, <Zm>.q, <Zn>.q
  • uzp1 <Zd>.q, <Zm>.q, <Zn>.q
  • uzp2 <Zd>.q, <Zm>.q, <Zn>.q

These instructions are defined in Armv8.6-A.

Diff Detail

Event Timeline

fpetrogalli created this revision.May 29 2020, 3:50 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 29 2020, 3:50 PM

Update the pattern definition using what is already available for SVE.

sdesmalen accepted this revision.Jun 3 2020, 12:51 PM

LGTM

llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
1959–1972

nit: I know this is unrelated to your changes, but the _128 suffix for these instruction names breaks convention in this file. While you're changing these lines, can you change it to _Q?

This revision is now accepted and ready to land.Jun 3 2020, 12:51 PM

Replace _128 with _Q in the instruction definitions in tablegen.

This revision was automatically updated to reflect the committed changes.