[GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

[kschwarz]

Summary

Previously, we only added early-clobber flags to the 'group' immediate flag operand
of an inline asm operand.
However, we also have to add the EarlyClobber flag to the MachineOperand itself.

This fixes PR46028

[leonardchan]

LGTM. Confirmed the test passes after this and the correct assembly is generated. Thanks for the fix!

llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp

 //===-- lib/CodeGen/GlobalISel/InlineAsmLowering.cpp ----------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 ///
case InlineAsm::isOutput:
           const TargetRegisterClass *RC = MRI->getRegClass(OpInfo.Regs.front());
           Flag = InlineAsm::getFlagWordForRegClass(Flag, RC->getID());
         }
 
         Inst.addImm(Flag);
 
         for (Register Reg : OpInfo.Regs) {
           Inst.addReg(Reg,
-                      RegState::Define | getImplRegState(Reg.isPhysical()));
+                      RegState::Define | getImplRegState(Reg.isPhysical()) |
+                          (OpInfo.isEarlyClobber ? RegState::EarlyClobber : 0));
         }
 
         // Remember this output operand for later processing
         OutputOperands.push_back(OpInfo);
       }
 
       break;
     case InlineAsm::isInput: {

llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll

define void @asm_simple_register_clobber() {
   ; CHECK-LABEL: name: asm_simple_register_clobber
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   INLINEASM &"mov x0, 7", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $x0, !0
   ; CHECK:   RET_ReallyLR
   call void asm sideeffect "mov x0, 7", "~{x0}"(), !srcloc !0
   ret void
 }
 
+define i64 @asm_register_early_clobber() {
+  ; CHECK-LABEL: name: asm_register_early_clobber
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   INLINEASM &"mov $0, 7; mov $1, 7", 1 /* sideeffect attdialect */, 1441803 /* regdef-ec:GPR64common */, def early-clobber %0, 1441803 /* regdef-ec:GPR64common */, def early-clobber %1, !0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s64) = COPY %0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s64) = COPY %1
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
+  ; CHECK:   $x0 = COPY [[ADD]](s64)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  call { i64, i64 } asm sideeffect "mov $0, 7; mov $1, 7", "=&r,=&r"(), !srcloc !0
+  %asmresult = extractvalue { i64, i64 } %1, 0
+  %asmresult1 = extractvalue { i64, i64 } %1, 1
+  %add = add i64 %asmresult, %asmresult1
+  ret i64 %add
+}
+
 define i32 @test_specific_register_output() nounwind ssp {
   ; CHECK-LABEL: name: test_specific_register_output
   ; CHECK: bb.1.entry:
   ; CHECK:   INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w0
   ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
   ; CHECK:   $w0 = COPY [[COPY]](s32)
   ; CHECK:   RET_ReallyLR implicit $w0
 entry: