[DwarfExpression] Support entry values for indirect parameters

[vsk]

Summary

A struct argument can be passed-by-value to a callee via a pointer to a
temporary stack copy. Add support for emitting an entry value DBG_VALUE
when an indirect parameter DBG_VALUE becomes unavailable. This is done
by omitting DW_OP_stack_value from the entry value expression, to make
the expression describe the location of an object.

rdar://63373691

[djtodoro]

Great! Thanks!

I think we should update the LangRef.rst (entry_values section) as well.

In addition, can we add a test case checking MIR output after LiveDebugValues?

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

19

I know that the final effect is the same, but should this be DW_OP_entry_value 2 DW_OP_bregN 0 instead of DW_OP_entry_value 1 DW_OP_regN?

72

Nit: !25-36! could be attached to !24

80

I believe we do need all the attributes.

[aprantl]

llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

1287–1288

Can you add a comment? it's not necessarily obvious why an indirect entry value is not a memory location. Is it because an entry value is its own kind?

llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

790

What does "unusable" mean? Incorrect? Invalid?

2401–2402

same here

2407

factoring out this snippet into a template and reusing it in DwarfCompileUnit.cpp is probably not going to make this more readable, is it?

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

145–146

This comment is weird :-)

Additional flags that may be combined with any location description kind.?

148

Would it make more sense call this Indirect (w/o EntryValue) and treat it as a separate bit, so you can still test for EntryValue independently?

306

Is the dependency on MachineLocation really necessary, or could this just take a bool / enum IsIndirect?

307

see comment in header...

[vsk]

llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

1287–1288

This has more to do with pre-existing constraints in the dwarf emitter, more than anything else. DwarfExpression::addReg cannot be used with Memory location kinds, but we need that method to write out DW_OP_entry_value(DW_OP_regN).

I guess there's no such restriction for addBReg, but I'm not sure why we'd pick that representation (see Djordje's earlier comment).

llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

790

Should be "incorrect", fixed. It's "unusable" in the sense that the debugger will error out trying to evaluate the expression: it will think, "struct Foo /is/ the pointer in this register", instead of, "struct Foo is /pointed to/ by this register".

2407

I tried doing this a few different ways :). I couldn't find a clean solution. In the end I opted for adding 'DwarfExpression::adjustLocationKind' to share just some of the logic. Lmk what you think.

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

145–146

Fixed, that's much better.

148

Yes, that does seem better. It's more extensible this way, and anyway, most of the logic for treating direct/indirect entry values should be the same.

306

It aids encapsulation to not require clients to unpack the relevant bit of MachineLocation, I feel. I've changed this to accept a reference, to at least get rid of the header dependency. This seems acceptable to me, as DwarfExpression clients work with MachineLocation anyway.

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

19

I'm not sure, the DW_OP_regN description is simply the one that has already been wired up. Is there a reason to prefer 'DW_OP_bregN 0'?

72

That's a fair point, but I feel this is too onerous of a reduction to do by hand. As the MIR is already fairly reduced, I would prefer not to do this.

80

Fixed.

[vsk]

Address review feedback.

[vsk]

llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

790

Actually, this FIXME isn't correct. This is a holdover from an alternative implementation I had which introduced a DW_OP_LLVM_indirect_entry_value opcode. I'll remove this.

[vsk]

Remove incorrect fixme.

[djtodoro]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

148

mot -> not

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

19

I was thinking about a more complex entry values where the offset is other than 0, where by using this way of representation we'll have more complex expression for the same thing.
If we have expressions as:

1. DW_OP_entry_value 3 DW_OP_bregN M DW_OP_deref DW_OP_stack_value

2. DW_OP_entry_value 6 DW_OP_entry_value 1 DW_OP_regN DW_OP_plus_uconst M DW_OP_deref DW_OP_stack_value

The two expressions have the same effect. They push the value memory location pointed to by value of register N upon entering current subprogram plus M had upon entering of the current subprogram.

This may not be worth of considering now, but we can put a TODO marker in DwarfExpression.

(Sorry If I am asking to much) One quick question:

Should the DW_OP_entry_value(DW_OP_reg0 W0)) be an entry value expression with dw_op_deref + dw_op_stack_val?

[vsk]

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

19

These are good questions.

If the indirect parameter offset is not 0, then it seems perfectly fine to apply it outside of the nested entry value expression. However, we don't support emitting entry values in this case. I've added a test to illustrate that.

As for DW_OP_stack_value, I'm not sure it's the right thing to use for locations. It breaks LLDB, fwiw: LLDB doesn't have the type of the object available as it's evaluating a DWARF expression, so when it sees the DW_OP_deref, it can't figure out the size and fails to reconstruct the object.

[vsk]

Add test coverage for indirect parameter location with offset; fix typo; fix LangRef entry.

[aprantl]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

151

I'm going to be pedantic now: Should this be Indirect instead of IndirectValue? I.e., can there be non-values (= modifyable locations) that are indirect?

158

"adjust" sounds like you could call this more than once. Should it be "set" or "initialize"? Or even be the constructor?

[vsk]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

151

Oh, I wasn't aware "Value" connoted "non-modifiable". In that case, "Indirect" is certainly a better fit: the user can choose to modify the temporary slot in the caller for the indirect param if they'd like.

158

"set" sounds good. The location isn't always available when the DwarfExpression is constructed.

[vsk]

Address review feedback.

[vsk]

Apparently, we always describe the value of an indirect parameter as being "whatever is in the temporary slot", even if the callee modifies it: https://godbolt.org/z/ZgWr_n. So treating the indirect parameter DBG_VALUE as pointing to a (modifiable) location sounds consistent to me.

[djtodoro]

LGTM, thanks!

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

19

If the indirect parameter offset is not 0, then it seems perfectly fine to apply it outside of the nested entry value expression. However, we don't support emitting entry values in this case. I've added a test to illustrate that.

Thanks!

As for DW_OP_stack_value, I'm not sure it's the right thing to use for locations. It breaks LLDB, fwiw: LLDB doesn't have the type of the object available as it's evaluating a DWARF expression, so when it sees the DW_OP_deref, it can't figure out the size and fails to reconstruct the object.

Ah, sure.. The DW_OP_stack_value should be used for describing actual values rather than locations, so thanks!

lldb/test/API/functionalities/param_entry_vals/basic_entry_values/main.cpp

func14(int &sink, void (*target_no_tailcall)(int &, int)) {
   // 'smart' enough to stash the call target in a non-clobbered register.
   //
   // llvm.org/PR43926 tracks work in the compiler to emit call targets which
   // describe non-clobbered values.
   target_no_tailcall(sink, 123);
   target_no_tailcall(sink, 123);
 }
 
+/// A structure that is guaranteed -- when passed to a callee by value -- to be
+/// passed via a pointer to a temporary copy in the caller. On x86_64 & aarch64
+/// only.
+struct StructPassedViaPointerToTemporaryCopy {
+  // Under the 64-bit AAPCS, a struct larger than 16 bytes is not SROA'd, and
+  // is instead passed via pointer to a temporary copy.
+  long a, b, c;
+  StructPassedViaPointerToTemporaryCopy() : a(1), b(2), c(3) {}
+
+  // Failing that, a virtual method forces passing via pointer to a temporary
+  // copy under the common calling conventions (e.g. 32/64-bit x86, Linux/Win,
+  // according to https://www.agner.org/optimize/calling_conventions.pdf).
+  virtual void add_vtable() {}
+};
+
+__attribute__((noinline)) void func15(StructPassedViaPointerToTemporaryCopy S) {
+  use<StructPassedViaPointerToTemporaryCopy &>(S);
+  use<int &>(dummy);
+
+  ++global;
+  //% self.filecheck("expr S", "main.cpp", "-check-prefix=FUNC15-EXPR")
+  // FUNC15-EXPR: (a = 1, b = 2, c = 3)
+}
+
 __attribute__((disable_tail_calls)) int main() {
   int sink = 0;
   S1 s1;
 
   // Test location dumping for DW_OP_entry_value.
   func1(sink);
 
   sink = 2;
#endif
   func10(sink, 123);
 
   // Test that evaluation can "see through" tail calls.
   func12(sink, 123);
 
   // Test that evaluation can "see through" an indirect tail call.
   func14(sink, func13);
 
+  // Test evaluation of an entry value that dereferences a temporary stack
+  // slot set up by the caller for a StructPassedViaPointerToTemporaryCopy.
+  func15(StructPassedViaPointerToTemporaryCopy());
+
   return 0;
 }

llvm/docs/LangRef.rst

- ``DW_OP_LLVM_entry_value, N`` can only appear at the beginning of a
   entry. For example, ``!DIExpression(DW_OP_LLVM_entry_value, 1,
   DW_OP_plus_uconst, 123, DW_OP_stack_value)`` specifies an expression where
   the entry value of the debug value instruction's value/address operand is
   pushed to the stack, and is added with 123. Due to framework limitations
   ``N`` can currently only be 1.
 
   ``DW_OP_LLVM_entry_value`` is only legal in MIR. The operation is introduced
   by the ``LiveDebugValues`` pass; currently only for function parameters that
-  are unmodified throughout a function and that are described as simple
-  register location descriptions. The operation is also introduced by the
-  ``AsmPrinter`` pass when a call site parameter value
+  are unmodified throughout a function. Support is limited to function
+  parameter that are described as simple register location descriptions, or as
+  indirect locations (e.g. when a struct is passed-by-value to a callee via a
+  pointer to a temporary copy made in the caller). The entry value op is also
+  introduced by the ``AsmPrinter`` pass when a call site parameter value
   (``DW_AT_call_site_parameter_value``) is represented as entry value of the
   parameter.
 - ``DW_OP_breg`` (or ``DW_OP_bregx``) represents a content on the provided
   signed offset of the specified register. The opcode is only generated by the
   ``AsmPrinter`` pass to describe call site parameter value which requires an
   expression over two registers.
 - ``DW_OP_push_object_address`` pushes the address of the object which can then
   serve as a descriptor in subsequent calculation. This opcode can be used to

llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

 /// address information encoded in the DbgVariable, starting from the starting
 /// location.  Add the DWARF information to the die.
 void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die,
                                          dwarf::Attribute Attribute,
                                          const MachineLocation &Location) {
   DIELoc *Loc = new (DIEValueAllocator) DIELoc;
   DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
   const DIExpression *DIExpr = DV.getSingleExpression();
   DwarfExpr.addFragmentOffset(DIExpr);
-  if (Location.isIndirect())
-    DwarfExpr.setMemoryLocationKind();
+  DwarfExpr.setLocation(Location, DIExpr);
 
   DIExpressionCursor Cursor(DIExpr);
 
-  if (DIExpr->isEntryValue()) {
-    DwarfExpr.setEntryValueFlag();
+  if (DIExpr->isEntryValue())
     DwarfExpr.beginEntryValueExpression(Cursor);
-  }
 
   const TargetRegisterInfo &TRI = *Asm->MF->getSubtarget().getRegisterInfo();
   if (!DwarfExpr.addMachineRegExpression(TRI, Cursor, Location.getReg()))
     return;
   DwarfExpr.addExpression(std::move(Cursor));
 
   // Now attach the location information to the DIE.
   addBlock(Die, Attribute, DwarfExpr.finalize());

llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

for (auto New : NewWorklistItems)
                           New.second);
     NewWorklistItems.clear();
   }
 
   // Emit the call site parameter's value as an entry value.
   if (ShouldTryEmitEntryVals) {
     // Create an expression where the register's entry value is used.
     DIExpression *EntryExpr = DIExpression::get(
         MF->getFunction().getContext(), {dwarf::DW_OP_LLVM_entry_value, 1});
     for (auto RegEntry : ForwardedRegWorklist) {
       MachineLocation MLoc(RegEntry.first);
       finishCallSiteParams(MLoc, EntryExpr, RegEntry.second, Params);
     }
   }
 }
 
 void DwarfDebug::constructCallSiteEntryDIEs(const DISubprogram &SP,
void DwarfDebug::emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
   // Regular entry.
   if (Value.isInt()) {
     if (BT && (BT->getEncoding() == dwarf::DW_ATE_signed ||
                BT->getEncoding() == dwarf::DW_ATE_signed_char))
       DwarfExpr.addSignedConstant(Value.getInt());
     else
       DwarfExpr.addUnsignedConstant(Value.getInt());
   } else if (Value.isLocation()) {
     MachineLocation Location = Value.getLoc();
-    if (Location.isIndirect())
-      DwarfExpr.setMemoryLocationKind();
+    DwarfExpr.setLocation(Location, DIExpr);
     DIExpressionCursor Cursor(DIExpr);
 
-    if (DIExpr->isEntryValue()) {
-      DwarfExpr.setEntryValueFlag();
+    if (DIExpr->isEntryValue())
       DwarfExpr.beginEntryValueExpression(Cursor);
-    }
 
     const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
     if (!DwarfExpr.addMachineRegExpression(TRI, Cursor, Location.getReg()))
       return;
     return DwarfExpr.addExpression(std::move(Cursor));
   } else if (Value.isTargetIndexLocation()) {
     TargetIndexLocation Loc = Value.getTargetIndexLocation();
     // TODO TargetIndexLocation is a target-independent. Currently only the WebAssembly-specific
     // encoding is supported.

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

 
 namespace llvm {
 
 class AsmPrinter;
 class APInt;
 class DwarfCompileUnit;
 class DIELoc;
 class TargetRegisterInfo;
+class MachineLocation;
 
 /// Holds a DIExpression and keeps track of how many operands have been consumed
 /// so far.
 class DIExpressionCursor {
   DIExpression::expr_op_iterator Start, End;
 
 public:
   DIExpressionCursor(const DIExpression *Expr) {
protected:
   uint64_t OffsetInBits = 0;
 
   /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
   unsigned SubRegisterSizeInBits : 16;
   unsigned SubRegisterOffsetInBits : 16;
 
   /// The kind of location description being produced.
   enum { Unknown = 0, Register, Memory, Implicit };
 
-  /// The flags of location description being produced.
-  enum { EntryValue = 1, CallSiteParamValue };
+  /// Additional location flags which may be combined with any location kind.
+  /// Currently, entry values are not supported for the Memory location kind.
+  enum { EntryValue = 1 << 0, Indirect = 1 << 1, CallSiteParamValue = 1 << 2 };
 
   unsigned LocationKind : 3;
-  unsigned LocationFlags : 2;
+  unsigned LocationFlags : 3;
   unsigned DwarfVersion : 4;
 
 public:
+  /// Set the location (\p Loc) and \ref DIExpression (\p DIExpr) to describe.
+  void setLocation(const MachineLocation &Loc, const DIExpression *DIExpr);
+
   bool isUnknownLocation() const { return LocationKind == Unknown; }
 
   bool isMemoryLocation() const { return LocationKind == Memory; }
 
   bool isRegisterLocation() const { return LocationKind == Register; }
 
   bool isImplicitLocation() const { return LocationKind == Implicit; }
 
   bool isEntryValue() const { return LocationFlags & EntryValue; }
 
+  bool isIndirect() const { return LocationFlags & Indirect; }
+
   bool isParameterValue() { return LocationFlags & CallSiteParamValue; }
 
   Optional<uint8_t> TagOffset;
 
 protected:
   /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
   /// to represent a subregister.
   void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
public:
 
   /// Lock this down to become a memory location description.
   void setMemoryLocationKind() {
     assert(isUnknownLocation());
     LocationKind = Memory;
   }
 
   /// Lock this down to become an entry value location.
-  void setEntryValueFlag() { LocationFlags |= EntryValue; }
+  void setEntryValueFlags(const MachineLocation &Loc);
 
   /// Lock this down to become a call site parameter location.
   void setCallSiteParamValueFlag() { LocationFlags |= CallSiteParamValue; }
 
   /// Emit a machine register location. As an optimization this may also consume
   /// the prefix of a DwarfExpression if a more efficient representation for
   /// combining the register location and the first operation exists.
   ///
   /// \param FragmentOffsetInBits     If this is one fragment out of a

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

for (auto &Reg : DwarfRegs) {
       if (Reg.DwarfRegNo >= 0)
         addReg(Reg.DwarfRegNo, Reg.Comment);
       addOpPiece(Reg.SubRegSize);
     }
 
     if (isEntryValue())
       finalizeEntryValue();
 
-    if (isEntryValue() && !isParameterValue() && DwarfVersion >= 4)
+    if (isEntryValue() && !isIndirect() && !isParameterValue() &&
+        DwarfVersion >= 4)
       emitOp(dwarf::DW_OP_stack_value);
 
     DwarfRegs.clear();
     return true;
   }
 
   // Don't emit locations that cannot be expressed without DW_OP_stack_value.
   if (DwarfVersion < 4)
bool DwarfExpression::addMachineRegExpression(const TargetRegisterInfo &TRI,
   if (FBReg)
     addFBReg(SignedOffset);
   else
     addBReg(Reg.DwarfRegNo, SignedOffset);
   DwarfRegs.clear();
   return true;
 }
 
+void DwarfExpression::setEntryValueFlags(const MachineLocation &Loc) {
+  LocationFlags |= EntryValue;
+  if (Loc.isIndirect())
+    LocationFlags |= Indirect;
+}
+
+void DwarfExpression::setLocation(const MachineLocation &Loc,
+                                  const DIExpression *DIExpr) {
+  if (Loc.isIndirect())
+    // Do not treat entry value descriptions of indirect parameters as memory
+    // locations. This allows DwarfExpression::addReg() to add DW_OP_regN to an
+    // entry value description.
+    if (!DIExpr->isEntryValue())
+      setMemoryLocationKind();
+
+  if (DIExpr->isEntryValue())
+    setEntryValueFlags(Loc);
+}
+
 void DwarfExpression::beginEntryValueExpression(
     DIExpressionCursor &ExprCursor) {
   auto Op = ExprCursor.take();
   (void)Op;
   assert(Op && Op->getOp() == dwarf::DW_OP_LLVM_entry_value);
   assert(!isMemoryLocation() &&
          "We don't support entry values of memory locations yet");
   assert(!IsEmittingEntryValue && "Already emitting entry value?");

llvm/lib/CodeGen/LiveDebugValues.cpp

bool LiveDebugValues::isEntryValueCandidate(
   auto *DIVar = MI.getDebugVariable();
   if (!DIVar->isParameter())
     return false;
 
   // Do not consider parameters that belong to an inlined function.
   if (MI.getDebugLoc()->getInlinedAt())
     return false;
 
-  // Do not consider indirect debug values (TODO: explain why).
-  if (MI.isIndirectDebugValue())
-    return false;
-
   // Only consider parameters that are described using registers. Parameters
   // that are passed on the stack are not yet supported, so ignore debug
   // values that are described by the frame or stack pointer.
   if (!isRegOtherThanSPAndFP(MI.getOperand(0), MI, TRI))
     return false;
 
   // If a parameter's value has been propagated from the caller, then the
   // parameter's DBG_VALUE may be described using a register defined by some
   // instruction in the entry block, in which case we shouldn't create an
   // entry value.
   if (DefinedRegs.count(MI.getOperand(0).getReg()))
     return false;
 
   // TODO: Add support for parameters that have a pre-existing debug expressions
-  // (e.g. fragments, or indirect parameters using DW_OP_deref).
+  // (e.g. fragments).
   if (MI.getDebugExpression()->getNumElements() > 0)
     return false;
 
   return true;
 }
 
 /// Collect all register defines (including aliases) for the given instruction.
 static void collectRegDefs(const MachineInstr &MI, DefinedRegsSet &Regs,

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir

+# RUN: llc -emit-call-site-info -start-before=livedebugvalues -stop-after=machineverifier -o - %s \
+# RUN:   | FileCheck %s -check-prefix=MIR
+
+# Copied from dbgcall-site-indirect-param.mir, with hand modifications:
+# an offset is added to the indirect parameter DBG_VALUE.
+#
+# We do not support emitting an entry value in this case.
+
+# MIR:      renamable $w0 = LDRWui killed renamable $x8
+# MIR-NOT:  DBG_VALUE $x0, 0, {{.*}}, !DIExpression(DW_OP_LLVM_entry_value
+# MIR-NEXT: BL @baz
+# MIR-NEXT: frame-destroy LDPXpost
+# MIR-NEXT: TCRETURNdi @baz
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-ios10.0.0"
+
+  %struct.fat_ptr = type { i32*, i32*, i32* }
+
+  define i32 @bar(%struct.fat_ptr* nocapture readonly %f) local_unnamed_addr !dbg !13 {
+  entry:
+    call void @llvm.dbg.declare(metadata %struct.fat_ptr* %f, metadata !23, metadata !DIExpression()), !dbg !24
+    %ptr2 = bitcast %struct.fat_ptr* %f to i32**, !dbg !25
+    %0 = load i32*, i32** %ptr2, align 8, !dbg !25
+    %1 = load i32, i32* %0, align 4, !dbg !31
+    %call = tail call i32 @baz(i32 %1), !dbg !34
+    %call1 = tail call i32 @baz(i32 %call), !dbg !35
+    ret i32 %call1, !dbg !36
+  }
+
+  declare void @llvm.dbg.declare(metadata, metadata, metadata)
+
+  declare !dbg !4 i32 @baz(i32) local_unnamed_addr optsize
+
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!8, !9, !10, !11}
+  !llvm.ident = !{!12}
+
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None, sysroot: "/")
+  !1 = !DIFile(filename: "indirect.c", directory: "/tmp/fatptr")
+  !2 = !{}
+  !3 = !{!4}
+  !4 = !DISubprogram(name: "baz", scope: !1, file: !1, line: 4, type: !5, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
+  !5 = !DISubroutineType(types: !6)
+  !6 = !{!7, !7}
+  !7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !8 = !{i32 7, !"Dwarf Version", i32 4}
+  !9 = !{i32 2, !"Debug Info Version", i32 3}
+  !10 = !{i32 1, !"wchar_size", i32 4}
+  !11 = !{i32 7, !"PIC Level", i32 2}
+  !12 = !{!"clang"}
+  !13 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 5, type: !14, scopeLine: 5, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !22)
+  !14 = !DISubroutineType(types: !15)
+  !15 = !{!7, !16}
+  !16 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "fat_ptr", file: !1, line: 1, size: 192, elements: !17)
+  !17 = !{!18, !20, !21}
+  !18 = !DIDerivedType(tag: DW_TAG_member, name: "ptr", scope: !16, file: !1, line: 2, baseType: !19, size: 64)
+  !19 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64)
+  !20 = !DIDerivedType(tag: DW_TAG_member, name: "low", scope: !16, file: !1, line: 2, baseType: !19, size: 64, offset: 64)
+  !21 = !DIDerivedType(tag: DW_TAG_member, name: "high", scope: !16, file: !1, line: 2, baseType: !19, size: 64, offset: 128)
+  !22 = !{!23}
+  !23 = !DILocalVariable(name: "f", arg: 1, scope: !13, file: !1, line: 5, type: !16)
+  !24 = !DILocation(line: 5, column: 24, scope: !13)
+  !25 = !DILocation(line: 6, column: 23, scope: !13)
+  !31 = !DILocation(line: 6, column: 20, scope: !13)
+  !34 = !DILocation(line: 6, column: 16, scope: !13)
+  !35 = !DILocation(line: 6, column: 12, scope: !13)
+  !36 = !DILocation(line: 6, column: 5, scope: !13)
+
+...
+---
+name:            bar
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
+      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
+      stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:
+  - { bb: 0, offset: 8, fwdArgRegs:
+      - { arg: 0, reg: '$w0' } }
+  - { bb: 0, offset: 10, fwdArgRegs:
+      - { arg: 0, reg: '$w0' } }
+body:             |
+  bb.0.entry:
+    liveins: $x0, $lr
+
+    DBG_VALUE $x0, 0, !23, !DIExpression(DW_OP_plus_uconst, 12), debug-location !24
+    early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store 8 into %stack.1), (store 8 into %stack.0)
+    $fp = frame-setup ADDXri $sp, 0, 0
+    frame-setup CFI_INSTRUCTION def_cfa $w29, 16
+    frame-setup CFI_INSTRUCTION offset $w30, -8, debug-location !25
+    frame-setup CFI_INSTRUCTION offset $w29, -16, debug-location !25
+    renamable $x8 = LDRXui killed renamable $x0, 0, debug-location !25 :: (load 8 from %ir.ptr2)
+    renamable $w0 = LDRWui killed renamable $x8, 0, debug-location !31 :: (load 4 from %ir.0)
+    BL @baz, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0, debug-location !34
+    early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2, debug-location !35 :: (load 8 from %stack.1), (load 8 from %stack.0)
+    TCRETURNdi @baz, 0, csr_aarch64_aapcs, implicit $sp, implicit $w0, debug-location !35
+
+...

llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

+# RUN: llc -emit-call-site-info -start-before=livedebugvalues -stop-after=machineverifier -o - %s \
+# RUN:   | FileCheck %s -check-prefix=MIR
+
+# RUN: llc -emit-call-site-info -start-before=livedebugvalues -filetype=obj -o - %s \
+# RUN:   | llvm-dwarfdump - | FileCheck %s -check-prefix=DWARF -implicit-check-not=DW_OP_entry_value
+
+# // Original Source
+# struct fat_ptr {
+#   int *ptr, *low, *high;
+# };
+# extern int baz(int x);
+# int bar(struct fat_ptr f) {
+#   return baz(baz(*f.ptr));
+# }
+
+# MIR:      renamable $w0 = LDRWui killed renamable $x8
+# MIR-NEXT: DBG_VALUE $x0, 0, {{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+# MIR-NEXT: BL @baz
+# MIR-NEXT: frame-destroy LDPXpost
+# MIR-NEXT: TCRETURNdi @baz
+
+# After w0 is clobbered, we should get an indirect parameter entry value for "f".
+
+# DWARF-LABEL: DW_TAG_formal_parameter
+# DWARF-NEXT: DW_AT_location
+# DWARF-NEXT: [0x0000000000000000, 0x0000000000000010): DW_OP_breg0 W0+0
+# DWARF-NEXT: [0x0000000000000010, 0x000000000000001c): DW_OP_entry_value(DW_OP_reg0 W0))
+# DWARF-NEXT: DW_AT_name    ("f")
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-ios10.0.0"
+
+  %struct.fat_ptr = type { i32*, i32*, i32* }
+
+  define i32 @bar(%struct.fat_ptr* nocapture readonly %f) local_unnamed_addr !dbg !13 {
+  entry:
+    call void @llvm.dbg.declare(metadata %struct.fat_ptr* %f, metadata !23, metadata !DIExpression()), !dbg !24
+    %ptr2 = bitcast %struct.fat_ptr* %f to i32**, !dbg !25
+    %0 = load i32*, i32** %ptr2, align 8, !dbg !25
+    %1 = load i32, i32* %0, align 4, !dbg !31
+    %call = tail call i32 @baz(i32 %1), !dbg !34
+    %call1 = tail call i32 @baz(i32 %call), !dbg !35
+    ret i32 %call1, !dbg !36
+  }
+
+  declare void @llvm.dbg.declare(metadata, metadata, metadata)
+
+  declare !dbg !4 i32 @baz(i32) local_unnamed_addr optsize
+
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!8, !9, !10, !11}
+  !llvm.ident = !{!12}
+
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None, sysroot: "/")
+  !1 = !DIFile(filename: "indirect.c", directory: "/tmp/fatptr")
+  !2 = !{}
+  !3 = !{!4}
+  !4 = !DISubprogram(name: "baz", scope: !1, file: !1, line: 4, type: !5, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
+  !5 = !DISubroutineType(types: !6)
+  !6 = !{!7, !7}
+  !7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !8 = !{i32 7, !"Dwarf Version", i32 4}
+  !9 = !{i32 2, !"Debug Info Version", i32 3}
+  !10 = !{i32 1, !"wchar_size", i32 4}
+  !11 = !{i32 7, !"PIC Level", i32 2}
+  !12 = !{!"clang"}
+  !13 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 5, type: !14, scopeLine: 5, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !22)
+  !14 = !DISubroutineType(types: !15)
+  !15 = !{!7, !16}
+  !16 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "fat_ptr", file: !1, line: 1, size: 192, elements: !17)
+  !17 = !{!18, !20, !21}
+  !18 = !DIDerivedType(tag: DW_TAG_member, name: "ptr", scope: !16, file: !1, line: 2, baseType: !19, size: 64)
+  !19 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64)
+  !20 = !DIDerivedType(tag: DW_TAG_member, name: "low", scope: !16, file: !1, line: 2, baseType: !19, size: 64, offset: 64)
+  !21 = !DIDerivedType(tag: DW_TAG_member, name: "high", scope: !16, file: !1, line: 2, baseType: !19, size: 64, offset: 128)
+  !22 = !{!23}
+  !23 = !DILocalVariable(name: "f", arg: 1, scope: !13, file: !1, line: 5, type: !16)
+  !24 = !DILocation(line: 5, column: 24, scope: !13)
+  !25 = !DILocation(line: 6, column: 23, scope: !13)
+  !31 = !DILocation(line: 6, column: 20, scope: !13)
+  !34 = !DILocation(line: 6, column: 16, scope: !13)
+  !35 = !DILocation(line: 6, column: 12, scope: !13)
+  !36 = !DILocation(line: 6, column: 5, scope: !13)
+
+...
+---
+name:            bar
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
+      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
+      stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:
+  - { bb: 0, offset: 8, fwdArgRegs:
+      - { arg: 0, reg: '$w0' } }
+  - { bb: 0, offset: 10, fwdArgRegs:
+      - { arg: 0, reg: '$w0' } }
+body:             |
+  bb.0.entry:
+    liveins: $x0, $lr
+
+    DBG_VALUE $x0, 0, !23, !DIExpression(), debug-location !24
+    early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store 8 into %stack.1), (store 8 into %stack.0)
+    $fp = frame-setup ADDXri $sp, 0, 0
+    frame-setup CFI_INSTRUCTION def_cfa $w29, 16
+    frame-setup CFI_INSTRUCTION offset $w30, -8, debug-location !25
+    frame-setup CFI_INSTRUCTION offset $w29, -16, debug-location !25
+    renamable $x8 = LDRXui killed renamable $x0, 0, debug-location !25 :: (load 8 from %ir.ptr2)
+    renamable $w0 = LDRWui killed renamable $x8, 0, debug-location !31 :: (load 4 from %ir.0)
+    BL @baz, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0, debug-location !34
+    early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2, debug-location !35 :: (load 8 from %stack.1), (load 8 from %stack.0)
+    TCRETURNdi @baz, 0, csr_aarch64_aapcs, implicit $sp, implicit $w0, debug-location !35
+
+...