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[PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc.dcbtst, llvm.ppc.isync intrinsics
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Authored by amyk on May 8 2020, 8:28 AM.

Details

Summary

This patch adds LLVM intrinsics for the dcbt (Data Cache Block Touch),
dcbtst (Data Cache Block Touch for Store) and isync (Instruction
Synchronize) instructions.

The intrinsic for dcbt and dcbst in this patch are named llvm.ppc.dcbt.with.hint
and llvm.ppc.dcbtst.with.hint respectively as there already exists an intrinsic
for llvm.ppc.dcbt and llvm.ppc.dcbtst. However, the original variants of the
intrinsics do not accept the TH immediate field, whereas these variants do.

Diff Detail

Event Timeline

amyk created this revision.May 8 2020, 8:28 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 8 2020, 8:28 AM
amyk added a reviewer: Restricted Project.May 8 2020, 8:28 AM
lei accepted this revision as: lei.May 11 2020, 2:43 PM
lei added a subscriber: lei.

LGTM

This revision is now accepted and ready to land.May 11 2020, 2:43 PM
This revision was automatically updated to reflect the committed changes.