[AMDGPU] Drop 16 bit subreg suffixes on print

[rampitec]

Summary

We do not want to break asm syntax. These suffixes are
quite useful for debugging, so add an option to print
them. Right now it is NFC.

[arsenm]

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

29–33

Could this be implemented as an assembler variant (e.g. AT&T vs. intel syntax?)

[rampitec]

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

29–33

Probably. I did not explore this.

[rampitec]

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

29–33

Actually it looks like an overkill. x86 has created a separate InstPrinter as dialects are quite different. Here the difference is really minimal, I doubt it worth it.

[vpykhtin]

LGTM.

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

29–33

Is there AbsolutelyHidden attrubute?

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 #include <cassert>
 
 using namespace llvm;
 using namespace llvm::AMDGPU;
 
+static cl::opt<bool> Keep16BitSuffixes(
+  "amdgpu-keep-16-bit-reg-suffixes",
+  cl::desc("Keep .l and .h suffixes in asm for debugging purposes"),
+  cl::init(false),
+  cl::ReallyHidden);
+
 void AMDGPUInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   // FIXME: The current implementation of
   // AsmParser::parseRegisterOrRegisterNumber in MC implies we either emit this
   // as an integer or we provide a name which represents a physical register.
   // For CFI instructions we really want to emit a name for the DWARF register
   // instead, because there may be multiple DWARF registers corresponding to a
   // single physical register. One case where this problem manifests is with
   // wave32/wave64 where using the physical register name is ambiguous: if we
case AMDGPU::PRIVATE_RSRC_REG:
     llvm_unreachable("pseudo-register should not ever be emitted");
   case AMDGPU::SCC:
     llvm_unreachable("pseudo scc should not ever be emitted");
   default:
     break;
   }
 #endif
 
-  O << getRegisterName(RegNo);
+  StringRef RegName(getRegisterName(RegNo));
+  if (!Keep16BitSuffixes)
+    if (!RegName.consume_back(".l"))
+      RegName.consume_back(".h");
+
+  O << RegName;
 }
 
 void AMDGPUInstPrinter::printVOPDst(const MCInst *MI, unsigned OpNo,
                                     const MCSubtargetInfo &STI, raw_ostream &O) {
   if (OpNo == 0) {
     if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::VOP3)
       O << "_e64 ";
     else if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::DPP)

llvm/test/CodeGen/AMDGPU/lo16-hi16-illegal-copy.mir

-# RUN: not llc -march=amdgcn -mcpu=gfx802 -start-before postrapseudos -asm-verbose=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefixes=ERR,GFX8-ERR %s
-# RUN: not llc -march=amdgcn -mcpu=gfx802 -start-before postrapseudos -asm-verbose=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefix=GCN %s
-# RUN: not llc -march=amdgcn -mcpu=gfx900 -start-before postrapseudos -asm-verbose=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefix=ERR %s
-# RUN: not llc -march=amdgcn -mcpu=gfx900 -start-before postrapseudos -asm-verbose=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefixes=GCN,GFX9 %s
+# RUN: not llc -march=amdgcn -mcpu=gfx802 -start-before postrapseudos -asm-verbose=0 -amdgpu-keep-16-bit-reg-suffixes -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefixes=ERR,GFX8-ERR %s
+# RUN: not llc -march=amdgcn -mcpu=gfx802 -start-before postrapseudos -asm-verbose=0 -amdgpu-keep-16-bit-reg-suffixes -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefix=GCN %s
+# RUN: not llc -march=amdgcn -mcpu=gfx900 -start-before postrapseudos -asm-verbose=0 -amdgpu-keep-16-bit-reg-suffixes -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefix=ERR %s
+# RUN: not llc -march=amdgcn -mcpu=gfx900 -start-before postrapseudos -asm-verbose=0 -amdgpu-keep-16-bit-reg-suffixes -verify-machineinstrs %s -o - 2>&1 | FileCheck -check-prefixes=GCN,GFX9 %s
 
 # Note: GFX8 did not allow SDWA SGPR sources. Therefor no HI16 subregs can be used there.
 
 # GCN-LABEL: {{^}}lo_to_lo_illegal_vgpr_to_sgpr:
 # GCN: ; illegal copy v0.l to s1.l
 # ERR: error: <unknown>:0:0: in function lo_to_lo_illegal_vgpr_to_sgpr void (): illegal SGPR to VGPR copy
 name: lo_to_lo_illegal_vgpr_to_sgpr
 tracksRegLiveness: true