[AArch64] Fix MIR tests with invalid live-ins.

[efriedma]

Summary

A register can't be live if it isn't defined; fix issues in various testcases.

(I'm working on a MachineVerifier patch to verify this.)

[paquette]

LGTM

llvm/test/CodeGen/AArch64/jump-table-compress.mir

entries:
     - id:              3
       blocks:          [ '%bb.9' ]
     - id:              4
       blocks:          [ '%bb.9' ]
     - id:              5
       blocks:          [ '%bb.11' ]
 body:             |
   bb.0 (%ir-block.0):
+    liveins: $x8
 
   bb.1 (%ir-block.0):
     ; CHECK-LABEL: body:
     ; CHECK-LABEL: bb.1
     ; CHECK: JumpTableDest8
     liveins: $x8
     early-clobber $x10, dead early-clobber $x11 = JumpTableDest32 undef killed $x9, undef killed $x8, %jump-table.0
     BR killed $x10

llvm/test/CodeGen/AArch64/machine-copy-remove.mir

 #  AArch64RedundantCopyElimination::optimizeCopy works correctly.
 # CHECK-LABEL: name: test8
 # CHECK: x0 = COPY $xzr
 # CHECK: x1 = COPY $xzr
 name:            test8
 tracksRegLiveness: true
 body:             |
   bb.0:
-    liveins: $x0, $x1
+    liveins: $x0, $x1, $x2
 
     $x1 = COPY $x0
     CBNZX $x1, %bb.2
 
   bb.1:
     liveins: $x0, $x2
 
     $x0, $x1 = LDPXi $x2, 0

 tracksRegLiveness: true
 body:             |
   bb.0:
     liveins: $x0, $x1
 
     CBNZX $x0, %bb.2
 
   bb.1:
-    liveins: $x0, $x2
+    liveins: $x0
 
     $x0 = COPY $xzr
     B %bb.3
 
   bb.2:
     liveins: $x1
 
     $x0 = LDRXui $x1, 0

llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir

 # CHECK-DAG: bb.4
 # CHECK-NOT: $x[[REG]] = ORRXrs $xzr, $lr, 0
 # CHECK-DAG: BL
 name:            foo
 tracksRegLiveness: true
 fixedStack:
 body:             |
   bb.0:
-    $x25 = ORRXri $xzr, 1
+    $x9 = ORRXri $xzr, 1
     $lr = ORRXri $xzr, 1
   bb.1:
     liveins: $lr, $w9
     $w9 = ORRWri $wzr, 1
     $w9 = ORRWri $wzr, 1
     $w9 = ORRWri $wzr, 1
     $w9 = ORRWri $wzr, 1
     $w9 = ORRWri $wzr, 1

llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir

bb.0.entry:
     liveins: $w0, $x1, $x2
 
     $w0 = ADDSWri $w0, 1, 0, implicit-def $nzcv
     STRWui killed $w0, killed $x1, 0
     Bcc 1, %bb.2, implicit killed $nzcv
     B %bb.1
 
   bb.3:
+    liveins: $x2
+
     B %bb.1
 
   bb.1:
     liveins: $x2
 
     $w0 = COPY $wzr
     STRWui killed $w0, killed $x2, 0
 
   bb.2:
     RET_ReallyLR

llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir

bb.1:
     $w1 = COPY $w20
     RET $x0
 ...
 
 
 # Sink w19 to %bb.1 and w20 to %bb.2.
 # CHECK-LABEL: name: sinkcopy4
 # CHECK-LABEL: bb.0:
-# CHECK-NOT: renamable $w19 = COPY killed $w0
-# CHECK-NOT: renamable $w20 = COPY killed $w1
+# CHECK-NOT: renamable $w19 = COPY $w0
+# CHECK-NOT: renamable $w20 = COPY $w1
 # CHECK-LABEL: bb.1:
 # CHECK: liveins: $w0, $w1
-# CHECK: renamable $w19 = COPY killed $w0
+# CHECK: renamable $w19 = COPY $w0
 # CHECK-LABEL: bb.2:
 # CHECK: liveins: $w0, $w1
-# CHECK: renamable $w20 = COPY killed $w1
+# CHECK: renamable $w20 = COPY $w1
 name: sinkcopy4
 tracksRegLiveness: true
 body: |
   bb.0:
     liveins: $w0, $w1
     $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv
-    renamable $w19 = COPY killed $w0
-    renamable $w20 = COPY killed $w1
+    renamable $w19 = COPY $w0
+    renamable $w20 = COPY $w1
     Bcc 11, %bb.2, implicit $nzcv
     B %bb.1
 
   bb.1:
     liveins: $w1, $w19
     $w0 = ADDWrr $w1, $w19
     RET $x0
 

llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir

 #RUN: llc -mtriple=aarch64-- -run-pass prologepilog %s -o - | FileCheck %s
 # Check that we use the frame pointer to address the emergency spill slot.
 # Using the base pointer will result in an assert with "Emergency spill slot is
 # out of reach".
 ---
 name: hugeStack
 # CHECK-LABEL: name: hugeStack
 tracksRegLiveness: true
 frameInfo:
   localFrameSize:  256
 stack:
   - { id: 0, type: variable-sized,  alignment: 1 }
   - { id: 1, name: '', size: 32761, alignment: 8 }
 body: |
   bb.0:
+    liveins: $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+
     STRXui undef $x8, %stack.0, 0
     ; CHECK: STRXui undef $x8, $fp, 0
     B %bb.1
   bb.1:
-    liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+    liveins: $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+
     RET_ReallyLR implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26, implicit $x27, implicit $x28
 ...
 ---
 name: fpDoesNotFit
 # CHECK-LABEL: name: fpDoesNotFit
 tracksRegLiveness: true
 frameInfo:
   hasStackMap: true

llvm/test/CodeGen/AArch64/wineh4.mir

bb.1:
     $d8, $d9 = frame-destroy LDPDi $sp, 2 :: (load 8 from %stack.10), (load 8 from %stack.11)
     frame-destroy SEH_SaveFRegP 8, 9, 16
     early-clobber $sp, $d10, $d11 = frame-destroy LDPDpost $sp, 14 :: (load 8 from %stack.12), (load 8 from %stack.13)
     frame-destroy SEH_SaveFRegP_X 10, 11, -112
     frame-destroy SEH_EpilogEnd
     RET_ReallyLR implicit $x0
 
   bb.2:
-    liveins: $x28, $d11
+    liveins: $d11
 
     $x0 = COPY $d11
-    $x0 = ADDXrr $x0, killed $x28
+    $x0 = ADDXrr $x0, $x0
     frame-destroy SEH_EpilogStart
     $x19, $x20 = frame-destroy LDPXi $sp, 12 :: (load 8 from %stack.0), (load 8 from %stack.1)
     frame-destroy SEH_SaveRegP 19, 20, 96
     $x21, $x22 = frame-destroy LDPXi $sp, 10 :: (load 8 from %stack.2), (load 8 from %stack.3)
     frame-destroy SEH_SaveRegP 21, 22, 80
     $x23, $x24 = frame-destroy LDPXi $sp, 8 :: (load 8 from %stack.4), (load 8 from %stack.5)
     frame-destroy SEH_SaveRegP 23, 24, 64
     $x25, $x26 = frame-destroy LDPXi $sp, 6 :: (load 8 from %stack.6), (load 8 from %stack.7)

llvm/test/CodeGen/AArch64/wineh8.mir

bb.1:
     $d8, $d9 = frame-destroy LDPDi $sp, 2 :: (load 8 from %stack.10), (load 8 from %stack.11)
     frame-destroy SEH_SaveFRegP 8, 9, 16
     early-clobber $sp, $d10, $d11 = frame-destroy LDPDpost $sp, 14 :: (load 8 from %stack.12), (load 8 from %stack.13)
     frame-destroy SEH_SaveFRegP_X 10, 11, -112
     frame-destroy SEH_EpilogEnd
     RET_ReallyLR implicit $x0
 
   bb.2:
-    liveins: $x28, $d11
+    liveins: $d11
 
     $x0 = COPY $d11
-    $x0 = ADDXrr $x0, killed $x28
+    $x0 = ADDXrr $x0, $x0
     frame-destroy SEH_EpilogStart
     $x19, $x20 = frame-destroy LDPXi $sp, 12 :: (load 8 from %stack.0), (load 8 from %stack.1)
     frame-destroy SEH_SaveRegP 19, 20, 96
     $x21, $x22 = frame-destroy LDPXi $sp, 10 :: (load 8 from %stack.2), (load 8 from %stack.3)
     frame-destroy SEH_SaveRegP 21, 22, 80
     $x23, $x24 = frame-destroy LDPXi $sp, 8 :: (load 8 from %stack.4), (load 8 from %stack.5)
     frame-destroy SEH_SaveRegP 23, 24, 64
     $x25, $x26 = frame-destroy LDPXi $sp, 6 :: (load 8 from %stack.6), (load 8 from %stack.7)