[PowerPC] Don't do the folding if the operand is R0/X0

[steven.zhang]

Summary

We have this transformation in PowerPC peephole:

Replace instruction:
  renamable $x28 = ADDI8 renamable $x7, -8
  renamable $x28 = ADD8 killed renamable $x28, renamable $x0
  STFD killed renamable $f0, -8, killed renamable $x28 :: (store 8 into %ir._ind_cast99.epil)
with:
  renamable $x28 = ADDI8 renamable $x7, -16
  STFDX killed renamable $f0, $x0, killed $x28 :: (store 8 into %ir._ind_cast99.epil)

It is invalid as the '$x0' in STFDX is constant 0, not register r0.

stfdx FRS,RA,RB
if RA = 0 then b <- 0
else b <- (RA)
EA <- b +tea (RB)
MEM(EA, 8) <- (FRS)
MEMtag(EA, 8) <- 0

[nemanjai]

Ugh...
So we have a transformation that is called foldFrameOffset() and it would actually transform the attached test case? There does not appear to be any FrameIndex in the attached test case. So in addition to a missed check for R0/X0 vs. PPC::ZERO/PPC::ZERO8 we also have a transformation that says it folds frame offsets, but it does not really care about frame offsets - it just folds arithmetic into the index register.

I am not going to suggest that this be corrected in this patch, but this is something we should be much more diligent with.

The patch LGTM. Thanks for fixing the bug.

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

bool PPCInstrInfo::foldFrameOffset(MachineInstr &MI) const {
   unsigned ScaleReg = ADDMI->getOperand(ScaleRegIdx).getReg();
   auto NewDefFor = [&](unsigned Reg, MachineBasicBlock::iterator Start,
                        MachineBasicBlock::iterator End) {
     for (auto It = ++Start; It != End; It++)
       if (It->modifiesRegister(Reg, &getRegisterInfo()))
         return true;
     return false;
   };
+
+  // We are trying to replace the ImmOpNo with ScaleReg. Give up if it is
+  // treated as special zero when ScaleReg is R0/X0 register.
+  if (III.ZeroIsSpecialOrig == III.ImmOpNo &&
+      (ScaleReg == PPC::R0 || ScaleReg == PPC::X0))
+    return false;
+
   // Make sure no other def for ToBeChangedReg and ScaleReg between ADD Instr
   // and Imm Instr.
   if (NewDefFor(ToBeChangedReg, *ADDMI, MI) || NewDefFor(ScaleReg, *ADDMI, MI))
     return false;
 
   // Now start to do the transformation.
   LLVM_DEBUG(dbgs() << "Replace instruction: "
                     << "\n");

llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir

bb.0.entry:
     $x5 = LD 100, $x6
     ; CHECK: $x5 = LD 100, $x6
     STD killed $x5, killed $x6, 200
     ; CHECK: STD killed $x5, killed $x6, 200
     $x6 = LD 4, killed $x4
     ; CHECK: $x6 = LD 4, killed $x4
     BLR8 implicit $lr8, implicit $rm
 ...
+---
+name: testR0
+# Give up the folding if the register is R0/X0
+tracksRegLiveness: true
+body:             |
+  bb.0.entry:
+    liveins: $f1, $x0, $x3
+    $x4 = ADDI8 killed $x3, -8
+    $x4 = ADD8 killed $x4, $x0
+    STFD killed $f1, -8, killed $x4
+    ; CHECK-NOT: STFDX
+    BLR8 implicit $lr8, implicit $rm
+...