Page MenuHomePhabricator

[Coroutines 1/2] Improve symmetric control transfer feature

Authored by junparser on Mar 27 2020, 2:43 AM.



As @rsmith find in that musttail attribute is not added to some of the resume intrinsics. These are some optimizations need to do here:

  1. We only check llvm.coro.subfn.addr for now, however, the intrinsic can be replaced in CoroElide pass. Furthermore, we can support other function calls as long as they obey rules of musttail.
  1. in simplifyTerminatorLeadingToRet, we only check switch and unconditional branch instructions while suspend switch instruction can be reduced as conditional branch. This also break the optimization.

This patch implements part 1, all of the rules in shouldBeMustTail are same as verifyMustTailCall

TestPlan: check-llvm

Diff Detail

Event Timeline

junparser created this revision.Mar 27 2020, 2:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 27 2020, 2:43 AM
junparser edited the summary of this revision. (Show Details)Mar 27 2020, 2:44 AM
modocache accepted this revision.Mar 28 2020, 5:15 PM

Looks good to me! Initially I was wondering about whether shouldBeMustTail ought to check whether the next instruction is a ret, or a bitcast that's used by a ret, but I see simplifyTerminatorLeadingToRet takes care of that check. Thanks for the patch!

This revision is now accepted and ready to land.Mar 28 2020, 5:15 PM
This revision was automatically updated to reflect the committed changes.