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[AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter
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Authored by scott.linder on Mar 16 2020, 2:15 PM.

Details

Summary

Explanation is in a comment in the diff, but essentially printing a
physical register name here is ambiguous. Until we can implement
printing a DWARF register name here just use the encoding directly.

Diff Detail

Event Timeline

scott.linder created this revision.Mar 16 2020, 2:15 PM
scott.linder added a subscriber: RamNalamothu.

This should unblock @RamNalamothu working on the wave32 DWARF mapping.

t-tye accepted this revision.Mar 16 2020, 4:41 PM

Minor suggestion in comment.

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
37

v0 would be a better example than s0 as the vector registers have wave32 and wave64 DWARF versions, but the scalar registers are the same for both modes.

This revision is now accepted and ready to land.Mar 16 2020, 4:41 PM
scott.linder marked 2 inline comments as done.Mar 17 2020, 4:45 PM
scott.linder added inline comments.
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
37

Thank you for the catch! That was my intention, I just used the wrong prefix. Updated in the final diff.

This revision was automatically updated to reflect the committed changes.
scott.linder marked an inline comment as done.