[MLIR] Added llvm.freeze

[Sagar]

Summary

This patch adds llvm.freeze & processes undef constants from LLVM IR.

syntax:
LLVM IR
<result> = freeze ty <val>

MLIR LLVM Dialect
llvm.freeze val attr-dict : type

Example:
LLVM IR: %3 = freeze i32 5
MLIR: %6 = llvm.freeze %5 : !llvm.i32

[echristo]

Can you document the semantics somewhere? (I have no idea if other patches have done anything like this, but it does seem like something that should be documented somewhere).

[Sagar]

Had not run clang-format.

[ftynse]

Looks good, I mostly have nits.

In D75329#1897313, @echristo wrote:

Can you document the semantics somewhere? (I have no idea if other patches have done anything like this, but it does seem like something that should be documented somewhere).

In general, we should just refer to the relevant piece of LLVM's LangRef unless MLIR modeling has different semantics than LLVM IR (which we should avoid as much as possible).

mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp

512

Nit: could you keep these ordered in the same way as LLVM's LangRef?

mlir/test/Dialect/LLVMIR/roundtrip.mlir

288

Please avoid matching SSA names (%arg0). You can capture by putting // CHECK-SAME: %[[ARG0:.*]]: after the label

290

Nit: we usually just do %[[x:.*]]

[Sagar]

NIT changes done.

[ftynse]

Thanks!

[Sagar]

This comment was removed by Sagar.

[Sagar]

I do not have write access to the repository. If would be great if someone could commit for me.

[ftynse]

Which name and email should we associate with the commit?

[Sagar]

This is my Github account, https://github.com/Sagox
primary email address: [e-mail]
for name you could use my Github username or the one on Phabricator, doesn't really matter.

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

: LLVM_OneResultOp<"select",
           "$res = builder.CreateSelect($condition, $trueValue, $falseValue);"> {
   let builders = [OpBuilder<
     "Builder *b, OperationState &result, Value condition, Value lhs, "
     "Value rhs", [{
       build(b, result, lhs.getType(), condition, lhs, rhs);
     }]>];
   let assemblyFormat = "operands attr-dict `:` type($condition) `,` type($res)";
 }
+def LLVM_FreezeOp : LLVM_OneResultOp<"freeze", [SameOperandsAndResultType]>,
+                    Arguments<(ins LLVM_Type:$val)> {
+  let assemblyFormat = "$val attr-dict `:` type($val)";
+  string llvmBuilder = "builder.CreateFreeze($val);";
+}
 
 // Terminators.
 def LLVM_BrOp : LLVM_TerminatorOp<"br", []> {
   let parser = [{ return parseBrOp(parser, result); }];
   let printer = [{ printBrOp(p, *this); }];
 }
 def LLVM_CondBrOp : LLVM_TerminatorOp<"cond_br", []> {
   let verifier = [{

mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp

if (failed(processInstruction(i)))
       return nullptr;
     assert(instMap.count(i));
 
     // Remove this zombie LLVM instruction now, leaving us only with the MLIR
     // op.
     i->deleteValue();
     return instMap[c] = instMap[i];
   }
+  if (auto *ue = dyn_cast<llvm::UndefValue>(c)) {
+    LLVMType type = processType(ue->getType());
+    if (!type)
+      return nullptr;
+    return instMap[c] = bEntry.create<UndefOp>(UnknownLoc::get(context), type);
+  }
   emitError(unknownLoc) << "unhandled constant: " << diag(*c);
   return nullptr;
 }
 
 Value Importer::processValue(llvm::Value *value) {
   auto it = instMap.find(value);
   if (it != instMap.end())
     return it->second;
static const DenseMap<unsigned, StringRef> opcMap = {
     // FIXME: select
     // FIXME: vaarg
     // FIXME: extractelement
     // FIXME: insertelement
     // FIXME: shufflevector
     // FIXME: extractvalue
     // FIXME: insertvalue
     // FIXME: landingpad
+    INST(Freeze, Freeze)
 };
 #undef INST
 
 static ICmpPredicate getICmpPredicate(llvm::CmpInst::Predicate p) {
   switch (p) {
   default:
     llvm_unreachable("incorrect comparison predicate");
   case llvm::CmpInst::Predicate::ICMP_EQ:
     return LLVM::ICmpPredicate::eq;
LogicalResult Importer::processInstruction(llvm::Instruction *inst) {
   case llvm::Instruction::FPToSI:
   case llvm::Instruction::UIToFP:
   case llvm::Instruction::SIToFP:
   case llvm::Instruction::FPTrunc:
   case llvm::Instruction::FPExt:
   case llvm::Instruction::PtrToInt:
   case llvm::Instruction::IntToPtr:
   case llvm::Instruction::AddrSpaceCast:
+  case llvm::Instruction::Freeze:
   case llvm::Instruction::BitCast: {
     OperationState state(loc, opcMap.lookup(inst->getOpcode()));
     SmallVector<Value, 4> ops;
     ops.reserve(inst->getNumOperands());
     for (auto *op : inst->operand_values()) {
       Value value = processValue(op);
       if (!value)
         return failure();

mlir/test/Dialect/LLVMIR/roundtrip.mlir

 ^bb3:
   llvm.invoke @bar(%8, %6, %4) to ^bb2 unwind ^bb1 : (!llvm<"i8*">, !llvm<"i8*">, !llvm<"i8*">) -> ()
 
 // CHECK-NEXT: ^bb4:
 // CHECK-NEXT:   llvm.return %[[a0]] : !llvm.i32
 ^bb4:
   llvm.return %0 : !llvm.i32
 }
+
+// CHECK-LABEL: @useFreezeOp
+func @useFreezeOp(%arg0: !llvm.i32) {
+  // CHECK:  = llvm.freeze %arg0 : !llvm.i32
+  %0 = llvm.freeze %arg0 : !llvm.i32
+  // CHECK: %[[x:[0-9]+]] = llvm.mlir.undef : !llvm.i8
+  %1 = llvm.mlir.undef : !llvm.i8
+  // CHECK:  = llvm.freeze %[[x]] : !llvm.i8
+  %2 = llvm.freeze %1 : !llvm.i8
+  return
+}
 No newline at end of file

mlir/test/Target/import.ll

 ; CHECK: ^bb3:
   ; CHECK: %{{[0-9]+}} = llvm.invoke @bar(%[[a3]]) to ^bb2 unwind ^bb1 : (!llvm<"i8*">) -> !llvm<"i8*">
   %6 = invoke i8* @bar(i8* %1) to label %4 unwind label %2
 
 ; CHECK: ^bb4:
   ; CHECK: llvm.return %{{[0-9]+}} : !llvm.i32
   ret i32 0
 }
+
+;CHECK-LABEL: @useFreezeOp
+define i32 @useFreezeOp(i32 %x) {
+  ;CHECK: %{{[0-9]+}} = llvm.freeze %{{[0-9a-z]+}} : !llvm.i32
+  %1 = freeze i32 %x
+  %2 = add i8 10, 10
+  ;CHECK: %{{[0-9]+}} = llvm.freeze %{{[0-9]+}} : !llvm.i8
+  %3 = freeze i8 %2
+  %poison = add nsw i1 0, undef
+  ret i32 0
+}
 No newline at end of file

mlir/test/Target/llvmir.mlir

^bb2: // 2 preds: ^bb0, ^bb3
   llvm.return %5 : !llvm.i32
 
 // CHECK: [[final]]:
 // CHECK-NEXT: %{{[0-9]+}} = invoke i8* @bar(i8* %[[a1]])
 // CHECK-NEXT:          to label %[[normal]] unwind label %[[unwind]]
 ^bb3: // pred: ^bb1
   %8 = llvm.invoke @bar(%6) to ^bb2 unwind ^bb1 : (!llvm<"i8*">) -> !llvm<"i8*">
 }
+
+// CHECK-LABEL: @callFreezeOp
+llvm.func @callFreezeOp(%x : !llvm.i32) {
+  // CHECK: freeze i32 %{{[0-9]+}}
+  %0 = llvm.freeze %x : !llvm.i32
+  %1 = llvm.mlir.undef : !llvm.i32
+  // CHECK: freeze i32 undef 
+  %2 = llvm.freeze %1 : !llvm.i32
+  llvm.return
+}
 No newline at end of file