[ARM][AsmParser] Make assembly directives case insensitive

[ostannard]

LGTM with a few nits.

llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

10505

Don't use auto here, the type is not obvious.

llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

241

This is unrelated, should be a separate patch.

[DavidSpickett]

Posted https://reviews.llvm.org/D73972 as a new change for the ".tlsdescseq" directive.

[MaskRay]

Sorry, but I don't understand the rationale behind this change.

Yes, GNU as accepts .Section and llvm-mc doesn't. There are plenty of cases where MC does not recognize uppercase directives. I don't find this (libgloss/arm/linux-syscalls0.S) compelling enough to make MC accept every case-insensitive directive.
Changing the downstream projects may be more straightforward.

[DavidSpickett]

The rationale is that the case of a directive has never really been important even though we'd reject anything that isn't lower case. I looked at all the targets in LLVM and none of them specify anything that isn't all lower case (though nothing in the code prevents them from doing so). All the targets GCC supports will accept any case also, though they may document with a set format.

So yes, we could change projects that don't use lower case. It's presumably a small set because Clang has been around a while and that bugzilla is the only issue I know of.

My point is more, was the case of directives ever actually important or was it just implemented that way? Seems to me like the latter. Though I can't speak for other targets hence I've only changed the generic, ARM and AArch64 directives.

Thinking about it, whatever the behaviour it should be documented (perhaps here: https://llvm.org/docs/Extensions.html). Having alignment across targets would be best, which is something for a mailing list discussion. I will post there and put a link back here so you can reply there.

[DavidSpickett]

Posted http://lists.llvm.org/pipermail/llvm-dev/2020-February/138937.html if you want to comment there.

llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
   // MatchInstructionImpl(), but that's too late for aliases that include
   // any sort of suffix.
   const FeatureBitset &AvailableFeatures = getAvailableFeatures();
   unsigned AssemblerDialect = getParser().getAssemblerDialect();
   applyMnemonicAliases(Name, AvailableFeatures, AssemblerDialect);
 
   // First check for the ARM-specific .req directive.
   if (Parser.getTok().is(AsmToken::Identifier) &&
-      Parser.getTok().getIdentifier() == ".req") {
+      Parser.getTok().getIdentifier().lower() == ".req") {
     parseDirectiveReq(Name, NameLoc);
     // We always return 'error' for this, as we're done with this
     // statement and don't need to match the 'instruction."
     return true;
   }
 
   // Create the leading tokens for the mnemonic, split by '.' characters.
   size_t Start = 0, Next = Name.find('.');

 
 /// parseDirective parses the arm specific directives
 bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) {
   const MCObjectFileInfo::Environment Format =
     getContext().getObjectFileInfo()->getObjectFileType();
   bool IsMachO = Format == MCObjectFileInfo::IsMachO;
   bool IsCOFF = Format == MCObjectFileInfo::IsCOFF;
 
-  StringRef IDVal = DirectiveID.getIdentifier();
+  auto IDVal = DirectiveID.getIdentifier().lower();
   if (IDVal == ".word")
     parseLiteralValues(4, DirectiveID.getLoc());
   else if (IDVal == ".short" || IDVal == ".hword")
     parseLiteralValues(2, DirectiveID.getLoc());
   else if (IDVal == ".thumb")
     parseDirectiveThumb(DirectiveID.getLoc());
   else if (IDVal == ".arm")
     parseDirectiveARM(DirectiveID.getLoc());

llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

 void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {
   OS << "\t.fpu\t" << ARM::getFPUName(FPU) << "\n";
 }
 
 void ARMTargetAsmStreamer::finishAttributeSection() {}
 
 void
 ARMTargetAsmStreamer::AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *S) {
-  OS << "\t.tlsdescseq\t" << S->getSymbol().getName();
+  OS << "\t.tlsdescseq\t" << S->getSymbol().getName() << "\n";
 }
 
 void ARMTargetAsmStreamer::emitThumbSet(MCSymbol *Symbol, const MCExpr *Value) {
   const MCAsmInfo *MAI = Streamer.getContext().getAsmInfo();
 
   OS << "\t.thumb_set\t";
   Symbol->print(OS, MAI);
   OS << ", ";

llvm/test/MC/ARM/directives-case_insensitive.s

+// RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
+
+.WORD 0x12345678
+# CHECK: .long 305419896
+
+.SHORT 0x1234
+# CHECK: .short 4660
+
+.HWORD 0x3456
+# CHECK: .short 13398
+
+.ARM
+# CHECK: .code 32
+
+.THUMB_FUNC
+
+.CODE 32
+# CHECK: .code 32
+
+.SYNTAX unified
+
+foo .REQ r5
+.UNREQ foo
+
+.FNSTART
+# CHECK: .fnstart
+.CANTUNWIND
+# CHECK: .cantunwind
+.FNEND
+# CHECK: .fnend
+
+.FNSTART
+# CHECK: .fnstart
+.UNWIND_RAW 4, 0xb1, 0x01
+# CHECK: .unwind_raw 4, 0xb1, 0x1
+.PERSONALITY  __gxx_personality_v0
+# CHECK: .personality __gxx_personality_v0
+.HANDLERDATA
+# CHECK: .handlerdata
+.FNEND
+# CHECK: .fnend
+
+.FNSTART
+# CHECK: .fnstart
+.MOVSP r7
+# CHECK: .movsp r7
+.PERSONALITYINDEX 0
+# CHECK: .personalityindex 0
+.PAD #16
+# CHECK: .pad #16
+.SETFP r11, sp, #8
+# CHECK: .setfp r11, sp, #8
+.SAVE   {r4, r5, r11, lr}
+# CHECK: .save  {r4, r5, r11, lr}
+.VSAVE  {d0}
+# CHECK: .vsave {d0}
+.FNEND
+# CHECK: .fnend
+
+.LTORG
+
+.POOL
+
+.EVEN
+# CHECK: .p2align 1
+
+.ALIGN 2
+# CHECK: .p2align 2
+
+.ARCH armv8-a
+# CHECK: .arch  armv8-a
+.ARCH_EXTENSION crc
+
+.CPU cortex-a8
+# CHECK: .cpu cortex-a8
+.EABI_ATTRIBUTE Tag_CPU_name, "cortex-a9"
+# CHECK: .cpu cortex-a9
+
+.THUMB_SET bar, 1
+# CHECK: .thumb_set  bar, 1
+
+.INST 0x87654321
+# CHECK: .inst 0x87654321
+.THUMB
+# CHECK: .code 16
+.INST.N 0xCAFE
+# CHECK: .inst.n 0xcafe
+.INST.W 0x44445555
+# CHECK: .inst.w 0x44445555
+
+.FPU neon
+# CHECK: .fpu neon
+
+.TLSDESCSEQ variable
+# CHECK: .tlsdescseq  variable
+
+.OBJECT_ARCH armv8
+# CHECK: .object_arch armv8-a
+