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Differential D72105

AMDGPU/GlobalISel: Assume vcc phis for any vcc input
ClosedPublic

Authored by arsenm on Jan 2 2020, 1:07 PM.

Details

Reviewers
nhaehnle
kerbowa
tstellar
Summary

This produces more intelligible looking results, more comparabble to
the DAG output in the simplest cases. This is probably wrong in
complex control flow, but RegBankSelect doesn't attempt analyzing if
this is on a masked path for selecting the bank yet.

Diff Detail

Revision Contents

Diff 235935

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Show First 20 Lines • Show All 2,112 Lines • ▼ Show 20 Lines
static int regBankBoolUnion(int RB0, int RB1) { static int regBankBoolUnion(int RB0, int RB1) {
if (RB0 == -1) if (RB0 == -1)
return RB1; return RB1;
if (RB1 == -1) if (RB1 == -1)
return RB0; return RB0;
// vcc, vcc -> vcc // vcc, vcc -> vcc
if (RB0 == AMDGPU::VCCRegBankID && RB1 == AMDGPU::VCCRegBankID) // vcc, sgpr -> vcc
// vcc, vgpr -> vcc
if (RB0 == AMDGPU::VCCRegBankID || RB1 == AMDGPU::VCCRegBankID)
return AMDGPU::VCCRegBankID; return AMDGPU::VCCRegBankID;
// vcc, sgpr -> vgpr
// vcc, vgpr -> vgpr // vcc, vgpr -> vgpr
return regBankUnion(RB0, RB1); return regBankUnion(RB0, RB1);
} }
const RegisterBankInfo::ValueMapping * const RegisterBankInfo::ValueMapping *
AMDGPURegisterBankInfo::getSGPROpMapping(Register Reg, AMDGPURegisterBankInfo::getSGPROpMapping(Register Reg,
const MachineRegisterInfo &MRI, const MachineRegisterInfo &MRI,
const TargetRegisterInfo &TRI) const { const TargetRegisterInfo &TRI) const {
▲ Show 20 Lines • Show All 925 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir

Show First 20 Lines • Show All 203 Lines • ▼ Show 20 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_scc_vcc_sbranch ; GREEDY-LABEL: name: phi_s1_scc_vcc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $sgpr0, $sgpr1, $vgpr0 ; GREEDY: liveins: $sgpr0, $sgpr1, $vgpr0
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; GREEDY: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $sgpr0, $sgpr1, $vgpr0 liveins: $sgpr0, $sgpr1, $vgpr0
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
Show All 34 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_vcc_scc_sbranch ; GREEDY-LABEL: name: phi_s1_vcc_scc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1 ; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; GREEDY: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $vgpr0, $sgpr0, $sgpr1 liveins: $vgpr0, $sgpr0, $sgpr1
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $sgpr0 %1:_(s32) = COPY $sgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
▲ Show 20 Lines • Show All 414 Lines • ▼ Show 20 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32) ; FAST: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32)
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_vcc_s_sbranch ; GREEDY-LABEL: name: phi_s1_vcc_s_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1 ; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32) ; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32)
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $vgpr0, $sgpr0, $sgpr1 liveins: $vgpr0, $sgpr0, $sgpr1
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $sgpr0 %1:_(s32) = COPY $sgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
Show All 34 Linesbody: |
; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_s_vcc_sbranch ; GREEDY-LABEL: name: phi_s1_s_vcc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1 ; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32) ; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; GREEDY: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $vgpr0, $sgpr0, $sgpr1 liveins: $vgpr0, $sgpr0, $sgpr1
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
▲ Show 20 Lines • Show All 492 Lines • ▼ Show 20 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1)
; FAST: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 123 ; FAST: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 123
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C1]](s32) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C1]](s32)
; FAST: [[C2:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 456 ; FAST: [[C2:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 456
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[C2]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C2]](s32)
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]] ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_vcc_result_scc_scc_sbranch ; GREEDY-LABEL: name: phi_s1_vcc_result_scc_scc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $sgpr0, $sgpr1, $sgpr2 ; GREEDY: liveins: $sgpr0, $sgpr1, $sgpr2
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1)
; GREEDY: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 123 ; GREEDY: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 123
; GREEDY: [[C2:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 456 ; GREEDY: [[C2:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 456
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[C1]], [[C2]] ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[C1]], [[C2]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $sgpr0, $sgpr1, $sgpr2 liveins: $sgpr0, $sgpr1, $sgpr2
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s32) = COPY $sgpr2 %2:_(s32) = COPY $sgpr2
Show All 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir

Show First 20 Lines • Show All 754 Lines • ▼ Show 20 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_scc_vcc_sbranch ; GREEDY-LABEL: name: phi_s1_scc_vcc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $sgpr0, $sgpr1, $vgpr0 ; GREEDY: liveins: $sgpr0, $sgpr1, $vgpr0
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP2:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; GREEDY: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $sgpr0, $sgpr1, $vgpr0 liveins: $sgpr0, $sgpr1, $vgpr0
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
Show All 34 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_vcc_scc_sbranch ; GREEDY-LABEL: name: phi_s1_vcc_scc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1 ; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP2:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP2]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; GREEDY: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $vgpr0, $sgpr0, $sgpr1 liveins: $vgpr0, $sgpr0, $sgpr1
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $sgpr0 %1:_(s32) = COPY $sgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
▲ Show 20 Lines • Show All 414 Lines • ▼ Show 20 Linesbody: |
; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP1]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP1]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32) ; FAST: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32)
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_vcc_s_sbranch ; GREEDY-LABEL: name: phi_s1_vcc_s_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1 ; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP1]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32) ; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY1]](s32)
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[ICMP]](s1), %bb.0, [[TRUNC]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $vgpr0, $sgpr0, $sgpr1 liveins: $vgpr0, $sgpr0, $sgpr1
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $sgpr0 %1:_(s32) = COPY $sgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
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; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; FAST: G_BRCOND [[ICMP]](s1), %bb.1 ; FAST: G_BRCOND [[ICMP]](s1), %bb.1
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.1: ; FAST: bb.1:
; FAST: successors: %bb.2(0x80000000) ; FAST: successors: %bb.2(0x80000000)
; FAST: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; FAST: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; FAST: G_BR %bb.2 ; FAST: G_BR %bb.2
; FAST: bb.2: ; FAST: bb.2:
; FAST: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1 ; FAST: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1
; FAST: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; FAST: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; FAST: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; FAST: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; FAST: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; FAST: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
; GREEDY-LABEL: name: phi_s1_s_vcc_sbranch ; GREEDY-LABEL: name: phi_s1_s_vcc_sbranch
; GREEDY: bb.0: ; GREEDY: bb.0:
; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GREEDY: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1 ; GREEDY: liveins: $vgpr0, $sgpr0, $sgpr1
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GREEDY: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0 ; GREEDY: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32) ; GREEDY: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]] ; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY2]](s32), [[C]]
; GREEDY: G_BRCOND [[ICMP]](s1), %bb.1 ; GREEDY: G_BRCOND [[ICMP]](s1), %bb.1
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.1: ; GREEDY: bb.1:
; GREEDY: successors: %bb.2(0x80000000) ; GREEDY: successors: %bb.2(0x80000000)
; GREEDY: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] ; GREEDY: [[ICMP1:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]
; GREEDY: G_BR %bb.2 ; GREEDY: G_BR %bb.2
; GREEDY: bb.2: ; GREEDY: bb.2:
; GREEDY: [[PHI:%[0-9]+]]:vgpr(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1 ; GREEDY: [[PHI:%[0-9]+]]:vcc(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[ICMP1]](s1), %bb.1
; GREEDY: [[COPY3:%[0-9]+]]:vcc(s1) = COPY [[PHI]](s1) ; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32) ; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; GREEDY: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) ; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[PHI]](s1), [[COPY3]], [[COPY4]]
; GREEDY: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY3]](s1), [[COPY4]], [[COPY5]]
; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32) ; GREEDY: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[SELECT]](s32)
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $vgpr0, $sgpr0, $sgpr1 liveins: $vgpr0, $sgpr0, $sgpr1
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s32) = COPY $sgpr1 %2:_(s32) = COPY $sgpr1
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