[XCOFF][AIX] Emit TOC entries for object file generation

[jasonliu]

Summary

Implement emitTCEntry for PPCTargetXCOFFStreamer.
Add TC csects to TOCCsects for object file writing.

Note:

1. I did not include any raw data testing for this object file generation because TC entries raw data will all be 0 without relocation implemented. I will add raw data testing as part of relocation testing later.
2. I removed "Symbol->setFragment(F);" for common symbols because we don't need it, and if we have it then we would hit assertions below:

Assertion `(SymbolContents == SymContentsUnset || SymbolContents == SymContentsOffset) && "Cannot get offset for a common/variable symbol"' failed.

3. Fixed incorrect TOC-base alignment.

[jasonliu]

Fixed incorrect TOC-base alignment.

[daltenty]

llvm/lib/MC/XCOFFObjectWriter.cpp

281

A bit of a question: This assumes an ordering of CSects in the MCAssembler. This works because we always create the TOC base first. Is it OK to impose ordering requirements on the MCAssembler?

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

250–253

Wouldn't a use of MAI->getCodePointerSize() be more appropriate here

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

1842

nit: s/TOC-base/The TOC-base will/

[DiggerLin]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

247

I am prefer not to added a new Is64Bit here.
PPCTargetStreamer has a data member (MCStreamer). MCStreamer->getContext()->getAsmInfo()->getCodePointerSize().

250–253

PPCTargetStreamer has a data member (MCStreamer). MCStreamer->getContext()->getAsmInfo()->getCodePointerSize().

Can we use getCodePointerSize() instead of Is64Bit？

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

281

If we take AIX system assembler as the reference assembler, TOC-base has to come first even in assembly parsing. Otherwise, assembly code got rejected.
For example,
I got this when .toc is not before .tc:

...
LC..0:
        .tc a[TC],a
        .toc
...

Assembler:
toc.s: line 10: 1252-018 Use a .tc inside a .toc scope only.
        Precede the .tc statements with a .toc statement.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

247

Thanks. Good idea.

250–253

Got it.

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

1842

I will add "The", but I don't think we need "will" here (we are stating something that's always the case, not something that's going to happen in the future).

[jasonliu]

Address David and Digger's comment.

[daltenty]

LGTM

llvm/lib/MC/MCXCOFFStreamer.cpp

 
 void MCXCOFFStreamer::EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
                                        unsigned ByteAlignment) {
   getAssembler().registerSymbol(*Symbol);
   Symbol->setExternal(cast<MCSymbolXCOFF>(Symbol)->getStorageClass() !=
                       XCOFF::C_HIDEXT);
   Symbol->setCommon(Size, ByteAlignment);
 
-  // Need to add this symbol to the current Fragment which will belong to the
-  // containing CSECT.
-  auto *F = dyn_cast_or_null<MCDataFragment>(getCurrentFragment());
-  assert(F && "Expected a valid section with a fragment set.");
-  Symbol->setFragment(F);
-
   // Emit the alignment and storage for the variable to the section.
   EmitValueToAlignment(ByteAlignment);
   EmitZeros(Size);
 }
 
 void MCXCOFFStreamer::EmitZerofill(MCSection *Section, MCSymbol *Symbol,
                                    uint64_t Size, unsigned ByteAlignment,
                                    SMLoc Loc) {

llvm/lib/MC/XCOFFObjectWriter.cpp

case XCOFF::XMC_BS:
     return BSSCsects;
   case XCOFF::XMC_TC0:
     assert(XCOFF::XTY_SD == MCSec->getCSectType() &&
            "Only an initialized csect can contain TOC-base.");
     assert(TOCCsects.empty() &&
            "We should have only one TOC-base, and it should be the first csect "
            "in this CsectGroup.");
     return TOCCsects;
+  case XCOFF::XMC_TC:
+    assert(XCOFF::XTY_SD == MCSec->getCSectType() &&
+           "Only an initialized csect can contain TC entry.");
+    assert(!TOCCsects.empty() &&
+           "We should at least have a TOC-base in this CsectGroup.");
+    return TOCCsects;
   default:
     report_fatal_error("Unhandled mapping of csect to section.");
   }
 }
 
 void XCOFFObjectWriter::executePostLayoutBinding(MCAssembler &Asm,
                                                  const MCAsmLayout &Layout) {
   if (TargetObjectWriter->is64Bit())

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

public:
 
   void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset) override {
     llvm_unreachable("Unknown pseudo-op: .localentry");
   }
 };
 
 class PPCTargetXCOFFStreamer : public PPCTargetStreamer {
 public:
   PPCTargetXCOFFStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
 
   void emitTCEntry(const MCSymbol &S) override {
-    // Object writing TOC entries not supported yet.
+    const MCAsmInfo *MAI = Streamer.getContext().getAsmInfo();
+    const unsigned PointerSize = MAI->getCodePointerSize();
+    Streamer.EmitValueToAlignment(PointerSize);
+    Streamer.EmitSymbolValue(&S, PointerSize);
   }
 
   void emitMachine(StringRef CPU) override {
     llvm_unreachable("Machine pseudo-ops are invalid for XCOFF.");
   }
 
   void emitAbiVersion(int AbiVersion) override {
     llvm_unreachable("ABI-version pseudo-ops are invalid for XCOFF.");

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) {
   // the TOC base.
   if (M.empty())
     return;
 
   // Emit TOC base.
   MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection(
       StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT,
       SectionKind::getData());
+  // The TOC-base always has 0 size, but 4 byte alignment.
+  TOCBaseSection->setAlignment(Align(4));
   // Switch to section to emit TOC base.
   OutStreamer->SwitchSection(TOCBaseSection);
 
   PPCTargetStreamer &TS =
       static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
 
   for (auto &I : TOC) {
     // Setup the csect for the current TC entry.

llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll

 ; CHECK-NEXT:     Type: 0x0
 ; CHECK-NEXT:     StorageClass: C_HIDEXT (0x6B)
 ; CHECK-NEXT:     NumberOfAuxEntries: 1
 ; CHECK-NEXT:     CSECT Auxiliary Entry {
 ; CHECK-NEXT:       Index: [[#Index+9]]
 ; CHECK-NEXT:       SectionLen: 0
 ; CHECK-NEXT:       ParameterHashIndex: 0x0
 ; CHECK-NEXT:       TypeChkSectNum: 0x0
-; CHECK-NEXT:       SymbolAlignmentLog2: 0
+; CHECK-NEXT:       SymbolAlignmentLog2: 2
 ; CHECK-NEXT:       SymbolType: XTY_SD (0x1)
 ; CHECK-NEXT:       StorageMappingClass: XMC_TC0 (0xF)
 ; CHECK-NEXT:       StabInfoIndex: 0x0
 ; CHECK-NEXT:       StabSectNum: 0x0
 ; CHECK-NEXT:     }
 ; CHECK-NEXT:   }

llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll

 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
 
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
+
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
+; RUN: FileCheck --check-prefix=OBJ64 %s
+; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
+
 @a = external global i32, align 4
 @b = external global i64, align 8
 @c = external global i16, align 2
 @globa = common global i32 0, align 4
 
 @ptr = internal global void (...)* null, align 4
 
 ; CHECK-NOT: .toc
-
+; SYMS-NOT: Name: TOC

llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll

 ; RUN: llc  -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes CHECK,CHECK32 %s
 ; RUN: llc  -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64  %s
 
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
+
+; RUN: not llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \
+; RUN: < %s | FileCheck --check-prefix=XCOFF64 %s
+; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
+
 @a = external global i32, align 4
 @b = external global i64, align 8
 @c = external global i16, align 2
 @globa = common global i32 0, align 4
 
 @ptr = internal global void (...)* null, align 4
 
 declare void @foo()

 ; CHECK-NEXT: .tc   globa[TC],globa[RW]
 ; CHECK-NEXT: LC4:
 ; CHECK-NEXT: .tc   ptr[TC],ptr[BS]
 ; CHECK-NEXT: LC5:
 ; CHECK-NEXT: .tc   bar[TC],bar[DS]
 ; CHECK-NEXT: LC6:
 ; CHECK-NEXT: .tc   foo[TC],foo[DS]
 
+; SYM:       File: {{.*}}aix-xcoff-toc.ll.tmp.o
+; SYM:       Symbol {{[{][[:space:]] *}}Index: [[#INDX:]]{{[[:space:]] *}}Name: TOC
+; SYM-NEXT:    Value (RelocatableAddress): 0x54
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+1]]
+; SYM-NEXT:      SectionLen: 0
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC0 (0xF)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+2]]
+; SYM-NEXT:    Name: a
+; SYM-NEXT:    Value (RelocatableAddress): 0x54
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+3]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+4]]
+; SYM-NEXT:    Name: b
+; SYM-NEXT:    Value (RelocatableAddress): 0x58
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+5]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+6]]
+; SYM-NEXT:    Name: c
+; SYM-NEXT:    Value (RelocatableAddress): 0x5C
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+7]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+8]]
+; SYM-NEXT:    Name: globa
+; SYM-NEXT:    Value (RelocatableAddress): 0x60
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+9]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+10]]
+; SYM-NEXT:    Name: ptr
+; SYM-NEXT:    Value (RelocatableAddress): 0x64
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+11]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+12]]
+; SYM-NEXT:    Name: bar
+; SYM-NEXT:    Value (RelocatableAddress): 0x68
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+13]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }
+; SYM-NEXT:  Symbol {
+; SYM-NEXT:    Index: [[#INDX+14]]
+; SYM-NEXT:    Name: foo
+; SYM-NEXT:    Value (RelocatableAddress): 0x6C
+; SYM-NEXT:    Section: .data
+; SYM-NEXT:    Type: 0x0
+; SYM-NEXT:    StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:    NumberOfAuxEntries: 1
+; SYM-NEXT:    CSECT Auxiliary Entry {
+; SYM-NEXT:      Index: [[#INDX+15]]
+; SYM-NEXT:      SectionLen: 4
+; SYM-NEXT:      ParameterHashIndex: 0x0
+; SYM-NEXT:      TypeChkSectNum: 0x0
+; SYM-NEXT:      SymbolAlignmentLog2: 2
+; SYM-NEXT:      SymbolType: XTY_SD (0x1)
+; SYM-NEXT:      StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:      StabInfoIndex: 0x0
+; SYM-NEXT:      StabSectNum: 0x0
+; SYM-NEXT:    }
+; SYM-NEXT:  }