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Differential D69851

[mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section
ClosedPublic

Authored by atanasyan on Nov 5 2019, 8:03 AM.

Details

Reviewers
Petar.Avramovic
Commits
rGbf996f761b99: [mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section

Diff Detail

Event Timeline

atanasyan created this revision.Nov 5 2019, 8:03 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 5 2019, 8:03 AM
Herald added subscribers: jrtc27, hiraditya, arichardson, sdardis. · View Herald Transcript
atanasyan added a parent revision: D69849: [mips] Implement Octeon+ `saa` and `saad` instructions.Nov 5 2019, 8:03 AM
Petar.Avramovic accepted this revision.Nov 6 2019, 8:05 AM

LGTM.

This revision is now accepted and ready to land.Nov 6 2019, 8:05 AM
Closed by commit rGbf996f761b99: [mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section (authored by atanasyan). · Explain WhyNov 7 2019, 3:04 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
Mips/
MCTargetDesc/
4 lines
test/
MC/
Mips/
6 lines

Diff 228202

llvm/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h

Show First 20 Lines • Show All 133 Lines • ▼ Show 20 Lines void setCPR1SizeFromPredicates(const PredicateLibrary &P) {
else if (P.hasMSA()) else if (P.hasMSA())
CPR1Size = Mips::AFL_REG_128; CPR1Size = Mips::AFL_REG_128;
else else
CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32; CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32;
} }
template <class PredicateLibrary> template <class PredicateLibrary>
void setISAExtensionFromPredicates(const PredicateLibrary &P) { void setISAExtensionFromPredicates(const PredicateLibrary &P) {
if (P.hasCnMips()) if (P.hasCnMipsP())
ISAExtension = Mips::AFL_EXT_OCTEONP;
else if (P.hasCnMips())
ISAExtension = Mips::AFL_EXT_OCTEON; ISAExtension = Mips::AFL_EXT_OCTEON;
else else
ISAExtension = Mips::AFL_EXT_NONE; ISAExtension = Mips::AFL_EXT_NONE;
} }
template <class PredicateLibrary> template <class PredicateLibrary>
void setASESetFromPredicates(const PredicateLibrary &P) { void setASESetFromPredicates(const PredicateLibrary &P) {
ASESet = 0; ASESet = 0;
▲ Show 20 Lines • Show All 56 Lines • Show Last 20 Lines

llvm/test/MC/Mips/mips_abi_flags_xx.s

Show All 11 Lines
# RUN: llvm-mc /dev/null -triple mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=fpxx -filetype=obj -o - | \ # RUN: llvm-mc /dev/null -triple mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=fpxx -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations -A - | \ # RUN: llvm-readobj --sections --section-data --section-relocations -A - | \
# RUN: FileCheck %s -check-prefixes=CHECK-OBJ,CHECK-OBJ-32R6,CHECK-OBJ-MIPS # RUN: FileCheck %s -check-prefixes=CHECK-OBJ,CHECK-OBJ-32R6,CHECK-OBJ-MIPS
# RUN: llvm-mc /dev/null -triple mips64-unknown-linux-gnu -mcpu=octeon -filetype=obj -o - | \ # RUN: llvm-mc /dev/null -triple mips64-unknown-linux-gnu -mcpu=octeon -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations -A - | \ # RUN: llvm-readobj --sections --section-data --section-relocations -A - | \
# RUN: FileCheck %s -check-prefixes=CHECK-OBJ,CHECK-OBJ-64R2,CHECK-OBJ-OCTEON # RUN: FileCheck %s -check-prefixes=CHECK-OBJ,CHECK-OBJ-64R2,CHECK-OBJ-OCTEON
# RUN: llvm-mc -triple mips64-unknown-linux-gnu \
# RUN: -mcpu=octeon+ -filetype=obj -o - /dev/null \
# RUN: | llvm-readobj --sections --section-data --section-relocations -A - \
# RUN: | FileCheck %s -check-prefixes=CHECK-OBJ,CHECK-OBJ-64R2,CHECK-OBJ-OCTEONP
# CHECK-ASM: .module fp=xx # CHECK-ASM: .module fp=xx
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
# CHECK-OBJ-LABEL: Name: .MIPS.abiflags # CHECK-OBJ-LABEL: Name: .MIPS.abiflags
# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) # CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A)
# CHECK-OBJ: Flags [ (0x2) # CHECK-OBJ: Flags [ (0x2)
Show All 10 Lines
# CHECK-OBJ-LABEL: } # CHECK-OBJ-LABEL: }
# CHECK-OBJ: MIPS ABI Flags { # CHECK-OBJ: MIPS ABI Flags {
# CHECK-OBJ-NEXT: Version: 0 # CHECK-OBJ-NEXT: Version: 0
# CHECK-OBJ-32R1-NEXT: ISA: {{MIPS32$}} # CHECK-OBJ-32R1-NEXT: ISA: {{MIPS32$}}
# CHECK-OBJ-32R6-NEXT: ISA: MIPS32r6 # CHECK-OBJ-32R6-NEXT: ISA: MIPS32r6
# CHECK-OBJ-64R2-NEXT: ISA: MIPS64r2 # CHECK-OBJ-64R2-NEXT: ISA: MIPS64r2
# CHECK-OBJ-MIPS-NEXT: ISA Extension: None (0x0) # CHECK-OBJ-MIPS-NEXT: ISA Extension: None (0x0)
# CHECK-OBJ-OCTEON-NEXT: ISA Extension: Cavium Networks Octeon (0x5) # CHECK-OBJ-OCTEON-NEXT: ISA Extension: Cavium Networks Octeon (0x5)
# CHECK-OBJ-OCTEONP-NEXT: ISA Extension: Cavium Networks OcteonP (0x3)
# CHECK-OBJ-NEXT: ASEs [ (0x0) # CHECK-OBJ-NEXT: ASEs [ (0x0)
# CHECK-OBJ-NEXT: ] # CHECK-OBJ-NEXT: ]
# CHECK-OBJ-32R1-NEXT: FP ABI: Hard float (32-bit CPU, Any FPU) (0x5) # CHECK-OBJ-32R1-NEXT: FP ABI: Hard float (32-bit CPU, Any FPU) (0x5)
# CHECK-OBJ-32R6-NEXT: FP ABI: Hard float (32-bit CPU, Any FPU) (0x5) # CHECK-OBJ-32R6-NEXT: FP ABI: Hard float (32-bit CPU, Any FPU) (0x5)
# CHECK-OBJ-64R2-NEXT: FP ABI: Hard float (double precision) (0x1) # CHECK-OBJ-64R2-NEXT: FP ABI: Hard float (double precision) (0x1)
# CHECK-OBJ-32R1-NEXT: GPR size: 32 # CHECK-OBJ-32R1-NEXT: GPR size: 32
# CHECK-OBJ-32R6-NEXT: GPR size: 32 # CHECK-OBJ-32R6-NEXT: GPR size: 32
# CHECK-OBJ-64R2-NEXT: GPR size: 64 # CHECK-OBJ-64R2-NEXT: GPR size: 64
Show All 15 Lines