[PowerPC] Remove allow-deprecated-dag-overlap and fix broken tests

[jsji]

Summary

This is found during review of https://reviews.llvm.org/D67088.

CHECK-DAG is non-overlapping after https://reviews.llvm.org/D47106.
-allow-deprecated-dag-overlap was introduced to temporary accept old
behavior.

But it actually hide some broken tests, eg: test/CodeGen/PowerPC/swaps-le-1.ll
The codegen has changed, but the CHECK-DAG still PASS due to allowing overlap.

This patch remove the deprecated options, and fix the broken tests.

[jsji]

Ping ...

[jsji]

@shchenz Can you have a look? Since this should be committed before your https://reviews.llvm.org/D67088. Thanks.

[shchenz]

LGTM.

Thanks for cleaning this up.

llvm/test/CodeGen/PowerPC/build-vector-tests.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P9BE -implicit-check-not frsp
 ; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P9LE -implicit-check-not frsp
 ; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P8BE -implicit-check-not frsp
 ; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P8LE -implicit-check-not frsp
 
 ; This test case comes from the following C test case (included as it may be
 ; slightly more readable than the LLVM IR.
 
 ;/*  This test case provides various ways of building vectors to ensure we
 ;    produce optimal code for all cases. The cases are (for each type):
 ;    - All zeros

llvm/test/CodeGen/PowerPC/machine-combiner.ll

-; RUN: llc -verify-machineinstrs -O3 -mcpu=pwr7 -enable-unsafe-fp-math < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK -check-prefix=CHECK-PWR
-; RUN: llc -verify-machineinstrs -O3 -mcpu=a2q -enable-unsafe-fp-math < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK -check-prefix=CHECK-QPX
+; RUN: llc -verify-machineinstrs -O3 -mcpu=pwr7 -enable-unsafe-fp-math < %s | FileCheck  %s -check-prefix=CHECK -check-prefix=CHECK-PWR
+; RUN: llc -verify-machineinstrs -O3 -mcpu=a2q -enable-unsafe-fp-math < %s | FileCheck  %s -check-prefix=CHECK -check-prefix=CHECK-QPX
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Verify that the first two adds are independent regardless of how the inputs are
 ; commuted. The destination registers are used as source registers for the third add.
 
 define float @reassociate_adds1(float %x0, float %x1, float %x2, float %x3) {
 ; CHECK-LABEL: reassociate_adds1:

 ; produced because that would cost more compile time.
 
 define float @reassociate_adds5(float %x0, float %x1, float %x2, float %x3, float %x4, float %x5, float %x6, float %x7) {
 ; CHECK-LABEL: reassociate_adds5:
 ; CHECK:       # %bb.0:
 ; CHECK-DAG:   fadds [[REG12:[0-9]+]], 5, 6
 ; CHECK-DAG:   fadds [[REG0:[0-9]+]], 1, 2
 ; CHECK-DAG:   fadds [[REG11:[0-9]+]], 3, 4
-; CHECK:       fadds [[REG13:[0-9]+]], [[REG12]], 7
+; CHECK-DAG:   fadds [[REG13:[0-9]+]], [[REG12]], 7
 ; CHECK-DAG:   fadds [[REG1:[0-9]+]], [[REG0]], [[REG11]]
 ; CHECK-DAG:   fadds [[REG2:[0-9]+]], [[REG1]], [[REG13]]
 ; CHECK:       fadds 1, [[REG2]], 8
 ; CHECK-NEXT:    blr
 
   %t0 = fadd float %x0, %x1
   %t1 = fadd float %t0, %x2
   %t2 = fadd float %t1, %x3

llvm/test/CodeGen/PowerPC/memcpy-vec.ll

-; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=PWR7
-; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=PWR8
-; RUN: llc -verify-machineinstrs -mcpu=a2q < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=A2Q
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck  %s -check-prefix=PWR7
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck  %s -check-prefix=PWR8
+; RUN: llc -verify-machineinstrs -mcpu=a2q < %s | FileCheck  %s -check-prefix=A2Q
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
 define void @foo1(double* nocapture %x, double* nocapture readonly %y) #0 {
 entry:
   %0 = bitcast double* %x to i8*
   %1 = bitcast double* %y to i8*
   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %0, i8* align 8 %1, i64 32, i1 false)
   ret void
 
 ; PWR7-LABEL: @foo1
 ; PWR7-NOT: bl memcpy
 ; PWR7-DAG: li [[OFFSET:[0-9]+]], 16
 ; PWR7-DAG: lxvd2x [[TMP0:[0-9]+]], 4, [[OFFSET]]
-; PWR7-DAG: stxvd2x [[TMP0]], 0, 3
+; PWR7-DAG: stxvd2x [[TMP0]], 3, [[OFFSET]]
 ; PWR7-DAG: lxvd2x [[TMP1:[0-9]+]], 0, 4
 ; PWR7-DAG: stxvd2x [[TMP1]], 0, 3
 ; PWR7: blr
 
 ; PWR8-LABEL: @foo1
 ; PWR8: lxvw4x
 ; PWR8: stxvw4x
 ; PWR8: blr

llvm/test/CodeGen/PowerPC/swaps-le-1.ll

 ; RUN: llc -verify-machineinstrs -O3 -mcpu=pwr8 \
-; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -allow-deprecated-dag-overlap %s
+; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck  %s
 
 ; RUN: llc -verify-machineinstrs -O3 -mcpu=pwr8 -disable-ppc-vsx-swap-removal \
-; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -allow-deprecated-dag-overlap \
+; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck  \
 ; RUN:   -check-prefix=NOOPTSWAP %s
 
 ; RUN: llc -O3 -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:  -verify-machineinstrs -ppc-vsr-nums-as-vr < %s | FileCheck -allow-deprecated-dag-overlap \
+; RUN:  -verify-machineinstrs -ppc-vsr-nums-as-vr < %s | FileCheck  \
 ; RUN:  -check-prefix=CHECK-P9 --implicit-check-not xxswapd %s
 
 ; RUN: llc -O3 -mcpu=pwr9 -disable-ppc-vsx-swap-removal -mattr=-power9-vector \
 ; RUN:  -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s \
-; RUN:  | FileCheck -allow-deprecated-dag-overlap -check-prefix=NOOPTSWAP %s
+; RUN:  | FileCheck  -check-prefix=NOOPTSWAP %s
 
 ; LH: 2016-11-17
 ;   Updated align attritue from 16 to 8 to keep swap instructions tests.
 ;   Changes have been made on little-endian to use lvx and stvx
 ;   instructions instead of lxvd2x/xxswapd and xxswapd/stxvd2x for
 ;   aligned vectors with elements up to 4 bytes
 
 ; This test was generated from the following source:

 ; NOOPTSWAP-DAG: stxvd2x
 ; NOOPTSWAP-DAG: stxvd2x
 ; NOOPTSWAP: stxvd2x
 
 ; CHECK-P9-LABEL: @foo
 ; CHECK-P9-DAG: lxvx
 ; CHECK-P9-DAG: lxvx
 ; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
-; CHECK-P9-DAG: lxvx
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
+; CHECK-P9-DAG: lxv
 ; CHECK-P9-DAG: vadduwm
 ; CHECK-P9-DAG: vadduwm
 ; CHECK-P9-DAG: vadduwm
 ; CHECK-P9-DAG: vadduwm
 ; CHECK-P9-DAG: vmuluwm
 ; CHECK-P9-DAG: vmuluwm
 ; CHECK-P9-DAG: vmuluwm
 ; CHECK-P9-DAG: vmuluwm
 ; CHECK-P9-DAG: stxvx
-; CHECK-P9-DAG: stxvx
-; CHECK-P9-DAG: stxvx
-; CHECK-P9-DAG: stxvx
+; CHECK-P9-DAG: stxv
+; CHECK-P9-DAG: stxv
+; CHECK-P9-DAG: stxv
 

llvm/test/CodeGen/PowerPC/uint-to-fp-v4i32.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P9BE
 ; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P9LE
 ; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P8BE
 ; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck -allow-deprecated-dag-overlap %s \
+; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck  %s \
 ; RUN:   -check-prefix=P8LE
 define dso_local <2 x double> @test1(<8 x i16> %a) {
 ; P9BE-LABEL: test1:
 ; P9BE:       # %bb.0: # %entry
 ; P9BE-NEXT:    li r3, 0
 ; P9BE-NEXT:    vextuhlx r3, r3, v2
 ; P9BE-NEXT:    rlwinm r3, r3, 0, 16, 31
 ; P9BE-NEXT:    mtfprwz f0, r3